Atmel Evaluation Board using the SAM7SE Microcontroller AT91SAM7SE-EK AT91SAM7SE-EK Data Sheet

 6241B–ATARM–22-Mar-07

The PIO PC19 is erroneously used twice.

USB_CNX (VBUS detect) and A21/ALE (NAND Flash Address Latch Enable) uses this
PIO. There is no effect when PC19 is configured as A21 for the NAND Flash usage, but
USB_CNX state (VBUS) cannot be read at the same time.

The user has to swap PC19 to input mode to detect the VBUS state, but the NANDFlash
cannot be accessed in this configuration. 

In order to use the TWI in Fast Mode (up to 400 Kbits/s), the default 10 K

Ω

 resistors R28

and R29 should be replaced by smaller values (e.g., 2.2 K

Ω

). 

Note that there is no need to change the pull-up resistors if the TWI is used in Standard
Mode (up to 100 Kbits/s).

In the schematics (sheet 1/7, ”AT91SAM7SE-EK Diagram”), the MCLK and BCLK
sources implementation does not guarantee a correct phase relation as specified in the
AT73C213 datasheet.

Problem Fix/Workaround 

In his own design, the user must make sure the BCLK and MCLK clocks generation
implements the timing specified in the AT73C213 datasheet.