Atmel Xplained Pro Evaluation Kit ATSAM4E-XPRO ATSAM4E-XPRO Data Sheet

 

Atmel SAM4E Xplained Pro [USER GUIDE]

42216A-MCU-01/2014

14

45 [IRQ2]

PE4

IRQ2

IRQ1 and EDBG DGI

46 [PWM]

PD27

PWML3

EDBG DGI

47 [RESET]

PE0

GPIO

 

48 [VCC]

-

VCC_P3V3

 

49 [VCC]

-

VCC_P3V3

 

50 [GND]

-

GND

 

There is a 1x2 pin-header that is connected to the SAM4E chip erase pin (PB12) and 3V3 marked ERASE as

chip erase the SAM4E by place a jumper on the header and toggle the power to the board. After the power is

toggled the jumper should be removed. Using the chip erase jumper is the only way to erase a chip with the

security bit set, an application that immediatly sets invalid clock options or goes into deep sleep withouth any

wake-up sources.

In addition to the Xplained Pro standard connectors, SAM4E Xplained Pro has one header with spare signals

that offers access to the I/O of the microcontroller which are otherwise not easily available elsewhere or might

be favourable to have collected toghether. The headers has a pitch of 2.54mm.

1

PC0

Data line 0

SRAM, NAND and LCD connector

2

PC1

Data line 1

SRAM, NAND and LCD connector

3

PC2

Data line 2

SRAM, NAND and LCD connector

4

PC3

Data line 3

SRAM, NAND and LCD connector

5

PC4

Data line 4

SRAM, NAND and LCD connector

6

PC5

Data line 5

SRAM, NAND and LCD connector

7

PC6

Data line 6

SRAM, NAND and LCD connector

8

PC7

Data line 7

SRAM, NAND and LCD connector

9

PA23

CS

LCD connector

10

PE3

DISPLAY ENABLE

EDBG DGI and LCD connector

11

PC11

RE

SRAM and LCD connector

12

PC8

WE

SRAM and LCD connector

13

-

GND

 

14

-

VCC

 

The SAM4E Xplained Pro features two external ISSI IS61WV5128BLL-10TLI, 512Kx8, 10ns, SRAMs, SRAM0

and SRAM1. SRAM0 is connected to chip select NCS1 and SRAM1 is connected to chip select NCS3. SRAM

access can be configured in the Static Memory Controller in the SAM4E.

PC0

D0

Data line 0

NAND, LCD connector and EBI spare

header