Atmel XMEGA-A1 Xplained Evaluation Board ATAVRXPLAIN ATAVRXPLAIN Data Sheet

Product codes
ATAVRXPLAIN
Page of 13
 
AVR1010
 
 
5
8267B-AVR-12/10 
Minimize power consumption by switching clock sources rather than relying on 
prescaling alone for  reducing clock rates. 
2.6 Wake-Up Delays 
When the device wakes up from sleep modes deeper than IDLE (with the exception 
of the two STANDBY-modes), the system clock source must stabilize before the CPU 
starts to operate. This introduces a short delay which depends on the selected clock 
source. If an internal RC oscillator or external clock is used, the start-up delay is 6 
cycles. This is in addition to the RC oscillator start-up time. If the XTAL oscillator is 
used, the start-up delay is configurable. If frequency stability is wanted, it is 
recommended with start-up delays of 1,000 cycles for ceramic resonators and 
16,000cycles for quartz crystals respectively. This is in addition to the oscillator start-
up time, which will depend on the resonator and load capacitances. 
In addition, there is a 13 cycle minimum delay before an Interrupt Service Routine 
(ISR) starts executing after wake-up. This is due to, e.g. the program counter being 
pushed on stack and the jump to the ISR. 
During the start-up delay the power consumption is close to the power consumption in 
IDLE, and thus represents “inefficient” power. If possible, it is therefore recommended 
to wake up as seldom as possible and rather “do more” every time the device wakes 
up. 
To minimize the wake-up delay and conserve power, use an RC oscillator or external 
clock source, and wake up as seldom as possible.
 
2.7 Power Reduction Registers 
Most peripherals and internal modules can be individually stopped to avoid that these 
draw power in ACTIVE mode and in IDLE sleep. This is done by setting their 
respective bits in the Power Reduction Registers (PRR), which causes them to be 
disconnected from the peripheral clock domain. It is required to disable modules and 
peripherals via their respective control registers before setting their PRR bit, for the 
Power Reduction to be effective. Some modules must be reinitialized after clearing 
their PRR bit. Please refer to the sections about the individual PRR-bits in the 
datasheet manual for more information. 
In POWER-SAVE and POWER-DOWN the modules are stopped regardless of the 
PRRs, since the peripheral clock domain is disabled. 
To minimize power consumption, use the PRRs to disable peripherals and modules 
that are not used. 
2.8 RTC Clock Source 
One of the reasons for using IDLE, POWER-SAVE and EXTENDED STANDBY is 
that the RTC and its clock are active in these sleep modes. The RTC is commonly 
used to wake the device up at timed intervals. 
For most Atmel
®
 AVR
®
 XMEGA-families, three different oscillators can be used to 
clock the RTC: An external 32kHz crystal, the internal 32kHz RC oscillator and the 
internal 32kHz Ultra Low Power (ULP) oscillator. In all cases, a prescaled 1kHz clock 
signal is available and should be used for reduced power consumption. For the 
external 32kHz crystal oscillator, a special low power mode is also available 
(X32KLPM).