Atmel MCU Evaluation Kit AT91SAM7X-EK AT91SAM7X-EK Data Sheet

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SAM7X Series [SUMMARY DATASHEET]

6120IS–ATARM–14-Nov-13

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Protect Mode

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Easy debugging by preventing automatic operations 

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Fast Forcing

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Permits redirecting any interrupt source on the fast interrupt 

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General Interrupt Mask

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Provides processor synchronization on events without triggering an interrupt

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Comprises:

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One two-pin UART

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One Interface for the Debug Communication Channel (DCC) support

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One set of Chip ID Registers

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One Interface providing ICE Access Prevention

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Two-pin UART

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USART-compatible User Interface

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Programmable Baud Rate Generator

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Parity, Framing and Overrun Error

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Automatic Echo, Local Loopback and Remote Loopback Channel Modes

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Debug Communication Channel Support

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Offers visibility of COMMRX and COMMTX signals from the ARM Processor

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Chip ID Registers

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Identification of the device revision, sizes of the embedded memories, set of peripherals

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Chip ID is 0x275C 0A40 (MRL A) for SAM7X512

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Chip ID is 0x275B 0940 (MRL A or B) for SAM7X256

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Chip ID is 0x275B 0942 (MRL C) for SAM7X256

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Chip ID is 0x275A 0740 (MRL A or B) for SAM7X128

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Chip ID is 0x275A 0742 (MRL C) for SAM7X128

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20-bit programmable counter plus 12-bit interval counter

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12-bit key-protected Programmable Counter running on prescaled SLCK

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Provides reset or interrupt signals to the system

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Counter may be stopped while the processor is in debug state or in idle mode

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32-bit free-running counter with alarm running on prescaled SLCK

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Programmable 16-bit prescaler for SLCK accuracy compensation

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Two PIO Controllers, each controlling 31 I/O lines

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Fully programmable through set/clear registers

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Multiplexing of two peripheral functions per I/O line

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For each I/O line (whether assigned to a peripheral or used as general-purpose I/O)

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Input change interrupt