Atmel MCU Evaluation Kit AT91SAM7X-EK AT91SAM7X-EK Data Sheet

 36

SAM7X Series [SUMMARY DATASHEET]

6120IS–ATARM–14-Nov-13



Five internal clock inputs, as defined in 



Two multi-purpose input/output signals



Two global registers that act on all three TC channels



Four channels, one 16-bit counter per channel



Common clock generator, providing thirteen different clocks



One Modulo n counter providing eleven clocks



Two independent linear dividers working on modulo n counter outputs



Independent channel programming



Independent enable/disable commands



Independent clock selection



Independent period and duty cycle, with double buffering



Programmable selection of the output waveform polarity 



Programmable center or left aligned output waveform



USB V2.0 full-speed compliant,12 Mbits per second



Embedded USB V2.0 full-speed transceiver



Embedded 1352-byte dual-port RAM for endpoints



Six endpoints 



Endpoint 0: 8 bytes



Endpoint 1 and 2: 64 bytes ping-pong



Endpoint 3: 64 bytes



Endpoint 4 and 5: 256 bytes ping-pong



Ping-pong Mode (two memory banks) for bulk endpoints



Suspend/resume logic

•

Fully compliant with CAN 2.0A and 2.0B

•

Bit rates up to 1Mbit/s

•

Eight object oriented mailboxes each with the following properties:



CAN Specification 2.0 Part A or 2.0 Part B Programmable for each Message



Object configurable to receive (with overwrite or not) or transmit



Local tag and mask filters up to 29-bit identifier/channel



32-bit access to data registers for each mailbox data object



Uses a 16-bit time stamp on receive and transmit message



Hardware concatenation of ID unmasked bitfields to speedup family ID processing

TIMER_CLOCK1

MCK/2

TIMER_CLOCK2

MCK/8

TIMER_CLOCK3

MCK/32

TIMER_CLOCK4

MCK/128

TIMER_CLOCK5

MCK/1024