Atmel Xplained Evaluation Board AT32UC3L0-XPLD AT32UC3L0-XPLD Data Sheet
Product codes
AT32UC3L0-XPLD
11
32099G–06/2011
AT32UC3L016/32/64
Refer to the
for a description of the electrical properties
of the TWI, 5V Tolerant, and SMBUS pins.
3.2.2
Peripheral Functions
Each GPIO line can be assigned to one of several peripheral functions. The following table
describes how the various peripheral functions are selected. The last listed function has priority
in case multiple functions are enabled on the same pin.
describes how the various peripheral functions are selected. The last listed function has priority
in case multiple functions are enabled on the same pin.
3.2.3
JTAG Port Connections
If the JTAG is enabled, the JTAG will take control over a number of pins, irrespectively of the I/O
Controller configuration.
Controller configuration.
3.2.4
Nexus OCD AUX Port Connections
If the OCD trace system is enabled, the trace system will take control over a number of pins, irre-
spectively of the I/O Controller configuration. Two different OCD trace pin mappings are
possible, depending on the configuration of the OCD AXS register. For details, see the AVR32
UC Technical Reference Manual.
spectively of the I/O Controller configuration. Two different OCD trace pin mappings are
possible, depending on the configuration of the OCD AXS register. For details, see the AVR32
UC Technical Reference Manual.
Table 3-2.
Peripheral Functions
Function
Description
GPIO Controller Function multiplexing
GPIO and GPIO peripheral selection A to H
Nexus OCD AUX port connections
OCD trace system
aWire DATAOUT
aWire output in two-pin mode
JTAG port connections
JTAG debug port
Oscillators
OSC0, OSC32
Table 3-3.
JTAG Pinout
48-pin
Pin Name
JTAG Pin
11
PA00
TCK
14
PA01
TMS
13
PA02
TDO
4
PA03
TDI
Table 3-4.
Nexus OCD AUX Port Connections
Pin
AXS=1
AXS=0
EVTI_N
PA05
PB08
MDO[5]
PA10
PB00
MDO[4]
PA18
PB04
MDO[3]
PA17
PB05