Atmel Xplained Evaluation Board AT32UC3L0-XPLD AT32UC3L0-XPLD Data Sheet

32099G–06/2011

The following table describes the characteristics for the oscillator when a digital clock is applied
on XIN.

The following table describes the characteristics for the oscillator when a crystal is connected
between XIN and XOUT as shown in 

. The user must choose a crystal oscillator

where the crystal load capacitance 

C

L 

is within the range given in the table. The exact value of C

L

can be found in the crystal datasheet. The capacitance of the external capacitors (C

LEXT

) can

then be computed as follows:

where C

PCB

 is the capacitance of the PCB and 

C

i

 is the internal equivalent load capacitance.

Notes:

1. Please refer to the SCIF chapter for details.
2. Nominal crystal cycles.
3. These values are based on simulation and characterization of other AVR microcontrollers manufactured in the same pro-

cess technology. These values are not covered by test limits in production.

Digital Clock Characteristics

f

CPXIN

XIN clock frequency

50

MHz

t

CPXIN

XIN clock duty cycle

40

60

%

t

STARTUP

Startup time

0

cycles

C

IN

XIN input capacitance

TQFP48 package

7.0

pF

QFN48 package

6.7

C

LEXT

2 C

L

C

i

–

(

)

C

PCB

–

=

Crystal Oscillator Characteristics

f

OUT

Crystal oscillator frequency

0.45

10

16

MHz

C

L

Crystal load capacitance

6

18

pF

C

i

Internal equivalent load capacitance

2

t

STARTUP

Startup time

SCIF.OSCCTRL.GAIN = 2

30 000

cycles

I

OSC

Current consumption

Active mode, f = 0.45MHz, 
SCIF.OSCCTRL.GAIN = 0

30

µA

Active mode, f = 10MHz,

SCIF.OSCCTRL.GAIN = 2

170