Atmel Xplained Evaluation Board AT32UC3L0-XPLD AT32UC3L0-XPLD Data Sheet
Product codes
AT32UC3L0-XPLD
60
32099G–06/2011
AT32UC3L016/32/64
Figure 7-7.
ADC Input
The minimum sample and hold time (in ns) can be found using this formula:
Where n is the number of bits in the conversion.
is defined by the SHTIM field in the
ADCIFB ACR register. Please refer to the ADCIFB chapter for more information.
7.9.6.2
Applicable Conditions and Derating Data
ADCVREFP/2
C
ONCHIP
R
ONCHIP
Positive Input
R
SOURCE
C
SOURCE
V
IN
t
SAMPLEHOLD
R
ONCHIP
R
+
OFFCHIP
(
)
C
ONCHIP
C
OFFCHIP
+
(
)
×
2
n
1
+
(
)
ln
×
≥
t
SAMPLEHOLD
Table 7-30.
Transfer Characteristics 10-bit Resolution Mode
Parameter
Conditions
Min
Typ
Max
Units
Resolution
10
Bit
Integral non-linearity
ADC clock frequency = 6MHz
+/-2
LSB
Differential non-linearity
-0.9
1
Offset error
+/-4
Gain error
+/-4
Table 7-31.
Transfer Characteristics 8-bit Resolution Mode
Parameter
Conditions
Min
Typ
Max
Units
Resolution
8
Bit
Integral non-linearity
ADC clock frequency = 6MHz
+/-0.5
LSB
Differential non-linearity
-0.23
0.25
Offset error
+/-1
Gain error
+/-1