Atmel Evaluation Kit AT91SAM9G25-EK AT91SAM9G25-EK Data Sheet

Product codes
AT91SAM9G25-EK
Page of 1102
1045
SAM9G25 [DATASHEET]
11032C–ATARM–25-Jan-13
46.4
Clock Characteristics
46.4.1 Processor Clock Characteristics
46.4.2 Master Clock Characteristics 
The master clock is the maximum clock at which the system is able to run. It is given by the smallest value of the internal 
bus clock and EBI clock.
Note:
1.
For DDR2 usage only, there are no limitations to LP-DDR, SDRAM and mobile SDRAM.
Table 46-5. Processor Clock Waveform Parameters
Symbol
Parameter
Conditions
Min
Max
Units
1/(t
CPPCK
)
Processor Clock Frequency
VDDCORE = 0.9V 
T = 85°C
125
(1)
400
MHz
Table 46-6. Master Clock Waveform Parameters
Symbol
Parameter
Conditions
Min
Max
Units
1/(t
CPMCK
)
Master Clock Frequency
VDDCORE = 0.9V 
T = 85°C
125
(1)
133
MHz