Atmel Evaluation Kit AT91SAM9G25-EK AT91SAM9G25-EK Data Sheet

Product codes
AT91SAM9G25-EK
Page of 1102
111
SAM9G25 [DATASHEET]
11032C–ATARM–25-Jan-13
14.
Reset Controller (RSTC)
14.1
 Description
The Reset Controller (RSTC), based on power-on reset cells, handles all the resets of the system without any external
components. It reports which reset occurred last. 
The Reset Controller also drives independently or simultaneously the external reset and the peripheral and processor
resets.
14.2
Embedded Characteristics
z
Manages All Resets of the System, Including 
z
External Devices Through the NRST Pin
z
Processor Reset
z
Peripheral Set Reset
z
Backed-up Peripheral Reset 
z
Based on 
2
 Embedded Power-on Reset Cells
z
Reset Source Status
z
Status of the Last Reset
z
Either General Reset, Wake-up Reset, Software Reset, User Reset, Watchdog Reset
z
External Reset Signal Shaping 
z
AMBA
-compliant Interface 
z
Interfaces to the ARM
®
 Advanced Peripheral Bus