Atmel Evaluation Kit AT91SAM9G25-EK AT91SAM9G25-EK Data Sheet
Product codes
AT91SAM9G25-EK
160
SAM9G25 [DATASHEET]
11032C–ATARM–25-Jan-13
18.4
I/O Lines Description
18.5
Product Dependencies
18.5.1 Power Management
The Shutdown Controller is continuously clocked by Slow Clock. The Power Management Controller has no effect on the
behavior of the Shutdown Controller.
behavior of the Shutdown Controller.
18.6
Functional Description
The Shutdown Controller manages the main power supply. To do so, it is supplied with VDDBU and manages wake-up
input pins and one output pin, SHDN.
input pins and one output pin, SHDN.
A typical application connects the pin SHDN to the shutdown input of the DC/DC Converter providing the main power
supplies of the system, and especially VDDCORE and/or VDDIO. The wake-up inputs (WKUP0) connect to any push-
buttons or signal that wake up the system.
supplies of the system, and especially VDDCORE and/or VDDIO. The wake-up inputs (WKUP0) connect to any push-
buttons or signal that wake up the system.
The software is able to control the pin SHDN by writing the Shutdown Control Register (SHDW_CR) with the bit SHDW at
1. The shutdown is taken into account only 2 slow clock cycles after the write of SHDW_CR. This register is password-
protected and so the value written should contain the correct key for the command to be taken into account. As a result,
the system should be powered down.
1. The shutdown is taken into account only 2 slow clock cycles after the write of SHDW_CR. This register is password-
protected and so the value written should contain the correct key for the command to be taken into account. As a result,
the system should be powered down.
A level change on WKUP0 is used as wake-up. Wake-up is configured in the Shutdown Mode Register (SHDW_MR).
The transition detector can be programmed to detect either a positive or negative transition or any level change on
WKUP0. The detection can also be disabled. Programming is performed by defining WKMODE0.
The transition detector can be programmed to detect either a positive or negative transition or any level change on
WKUP0. The detection can also be disabled. Programming is performed by defining WKMODE0.
Moreover, a debouncing circuit can be programmed for WKUP0. The debouncing circuit filters pulses on WKUP0 shorter
than the programmed number of 16 SLCK cycles in CPTWK0 of the SHDW_MR register. If the programmed level
change is detected on a pin, a counter starts. When the counter reaches the value programmed in the corresponding
field, CPTWK0, the SHDN pin is released. If a new input change is detected before the counter reaches the
corresponding value, the counter is stopped and cleared. WAKEUP0 of the Status Register (SHDW_SR) reports the
detection of the programmed events on WKUP0 with a reset after the read of SHDW_SR.
than the programmed number of 16 SLCK cycles in CPTWK0 of the SHDW_MR register. If the programmed level
change is detected on a pin, a counter starts. When the counter reaches the value programmed in the corresponding
field, CPTWK0, the SHDN pin is released. If a new input change is detected before the counter reaches the
corresponding value, the counter is stopped and cleared. WAKEUP0 of the Status Register (SHDW_SR) reports the
detection of the programmed events on WKUP0 with a reset after the read of SHDW_SR.
The Shutdown Controller can be programmed so as to activate the wake-up using the RTC alarm (the detection of the
rising edge of the RTC alarm is synchronized with SLCK). This is done by writing the SHDW_MR register using the
RTCWKEN field. When enabled, the detection of the RTC alarm is reported in the RTCWK bit of the SHDW_SR Status
register. It is reset after the read of SHDW_SR. When using the RTC alarm to wake up the system, the user must ensure
that the RTC alarm status flag is cleared before shutting down the system.Otherwise, no rising edge of the status flag
may be detected and the wake-up fails fail.
rising edge of the RTC alarm is synchronized with SLCK). This is done by writing the SHDW_MR register using the
RTCWKEN field. When enabled, the detection of the RTC alarm is reported in the RTCWK bit of the SHDW_SR Status
register. It is reset after the read of SHDW_SR. When using the RTC alarm to wake up the system, the user must ensure
that the RTC alarm status flag is cleared before shutting down the system.Otherwise, no rising edge of the status flag
may be detected and the wake-up fails fail.
Table 18-1. I/O Lines Description
Name
Description
Type
WKUP0
Wake-up 0 input
Input
SHDN
Shutdown output
Output