Atmel Evaluation Kit AT91SAM9G25-EK AT91SAM9G25-EK Data Sheet
Product codes
AT91SAM9G25-EK
215
SAM9G25 [DATASHEET]
11032C–ATARM–25-Jan-13
23.
Parallel Input/Output (PIO) Controller
23.1
Description
The Parallel Input/Output Controller (PIO) manages up to 32 fully programmable input/output lines. Each I/O line may be
dedicated as a general-purpose I/O or be assigned to a function of an embedded peripheral. This assures effective
optimization of the pins of a product.
dedicated as a general-purpose I/O or be assigned to a function of an embedded peripheral. This assures effective
optimization of the pins of a product.
Each I/O line is associated with a bit number in all of the 32-bit registers of the 32-bit wide User Interface.
Each I/O line of the PIO Controller features:
z
An input change interrupt enabling level change detection on any I/O line.
z
Additional Interrupt modes enabling rising edge, falling edge, low level or high level detection on any I/O line.
z
A glitch filter providing rejection of glitches lower than one-half of PIO clock cycle.
z
A debouncing filter providing rejection of unwanted pulses from key or push button operations.
z
Multi-drive capability similar to an open drain I/O line.
z
Control of the pull-up and pull-down of the I/O line.
z
Input visibility and output control.
The PIO Controller also features a synchronous output providing up to 32 bits of data output in a single write operation.
23.2
Embedded Characteristics
z
Up to 32 Programmable I/O Lines
z
Fully Programmable through Set/Clear Registers
z
Multiplexing of Four Peripheral Functions per I/O Line
z
For each I/O Line (Whether Assigned to a Peripheral or Used as General Purpose I/O)
z
Input Change Interrupt
z
Programmable Glitch Filter
z
Programmable Debouncing Filter
z
Multi-drive Option Enables Driving in Open Drain
z
Programmable Pull Up on Each I/O Line
z
Pin Data Status Register, Supplies Visibility of the Level on the Pin at Any Time
z
Additional Interrupt Modes on a Programmable Event: Rising Edge, Falling Edge, Low Level or High Level
z
Lock of the Configuration by the Connected Peripheral
z
Synchronous Output, Provides Set and Clear of Several I/O lines in a Single Write
z
Write Protect Registers
z
Programmable Schmitt Trigger Inputs
z
Programmable I/O Delay
z
Programmable I/O Drive