Atmel Evaluation Kit AT91SAM9G25-EK AT91SAM9G25-EK Data Sheet

Product codes
AT91SAM9G25-EK
Page of 1102
295
SAM9G25 [DATASHEET]
11032C–ATARM–25-Jan-13
25.7.3 Bus Matrix Priority Registers A For Slaves
Name:
MATRIX_PRAS0...MATRIX_PRAS8
Address:
0xFFFFDE80 [0], 0xFFFFDE88 [1], 0xFFFFDE90 [2], 0xFFFFDE98 [3], 0xFFFFDEA0 [4], 0xFFFFDEA8 [5],
0xFFFFDEB0 [6], 0xFFFFDEB8 [7], 0xFFFFDEC0 [8], 0xFFFFDEC8 [9]
Access:
Read-write 
• MxPR: Master x Priority
Fixed priority of Master x for accessing the selected slave. The higher the number, the higher the priority.
All the masters programmed with the same MxPR value for the slave make up a priority pool.
Round-robin arbitration is used in the lowest (MxPR = 0) and highest (MxPR = 3) priority pools.
Fixed priority is used in intermediate priority pools (MxPR = 1) and (MxPR = 2).
 for details.
31
30
29
28
27
26
25
24
M7PR
M6PR
23
22
21
20
19
18
17
16
M5PR
M4PR
15
14
13
12
11
10
9
8
M3PR
M2PR
7
6
5
4
3
2
1
0
M1PR
M0PR