Atmel Evaluation Kit AT91SAM9G25-EK AT91SAM9G25-EK Data Sheet
Product codes
AT91SAM9G25-EK
431
SAM9G25 [DATASHEET]
11032C–ATARM–25-Jan-13
30.5.6 Write Protected Registers
To prevent any single software error that may corrupt DDRSDRC behavior, the registers listed below can be write-
protected by setting the WPEN bit in the DDRSDRC Write Protect Mode Register (DDRSDRC_WPMR).
protected by setting the WPEN bit in the DDRSDRC Write Protect Mode Register (DDRSDRC_WPMR).
If a write access in a write-protected register is detected, then the WPVS flag in the DDRSDRC Write Protect Status
Register (DDRSDRC_WPSR) is set and the field WPVSRC indicates in which register the write access has been
attempted.
Register (DDRSDRC_WPSR) is set and the field WPVSRC indicates in which register the write access has been
attempted.
The WPVS flag is automatically reset after reading the DDRSDRC Write Protect Status Register (DDRSDRC_WPSR).
Following is a list of the write protected registers:
z
z
z
z
z
z
z
z