Atmel Evaluation Kit AT91SAM9G25-EK AT91SAM9G25-EK Data Sheet

Product codes
AT91SAM9G25-EK
Page of 1102
494
SAM9G25 [DATASHEET]
11032C–ATARM–25-Jan-13
31.7.11 DMAC Channel Handler Disable Register
Name: DMAC_CHDR
Address:
0xFFFFEC2C (0), 0xFFFFEE2C (1)
Access: Write-only
Reset:
0x00000000
• DISx: Disable [7:0]
Write one to this field to disable the relevant DMAC Channel. The content of the FIFO is lost and the current AHB access is termi-
nated. Software must poll DIS[7:0] field in the DMAC_CHSR register to be sure that the channel is disabled.
• RESx: Resume [7:0]
Write one to this field to resume the channel transfer restoring its context.
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28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
RES7
RES6
RES5
RES4
RES3
RES2
RES1
RES0
7
6
5
4
3
2
1
0
DIS7
DIS6
DIS5
DIS4
DIS3
DIS2
DIS1
DIS0