Atmel Evaluation Kit AT91SAM9G25-EK AT91SAM9G25-EK Data Sheet
Product codes
AT91SAM9G25-EK
528
SAM9G25 [DATASHEET]
11032C–ATARM–25-Jan-13
z
If NB_TRANS = 2, the sequence should be either
z
MData0
z
MData0/Data1
z
If NB_TRANS = 1, the sequence should be
z
Data0
32.6.10.14 Isochronous Endpoint Handling: OUT Example
The user can ascertain the bank status (free or busy), and the toggle sequencing of the data packet for each bank with
the UDPHS_EPTSTAx register in the three bit fields as follows:
the UDPHS_EPTSTAx register in the three bit fields as follows:
z
TOGGLESQ_STA: PID of the data stored in the current bank
z
CURBK: Number of the bank currently being accessed by the microcontroller.
z
BUSY_BANK_STA: Number of busy bank
This is particularly useful in case of a missing data packet.
If the inter-packet delay between the OUT token and the Data is greater than the USB standard, then the ISO-OUT
transaction is ignored. (Payload data is not written, no interrupt is generated to the CPU.)
transaction is ignored. (Payload data is not written, no interrupt is generated to the CPU.)
If there is a data CRC (Cyclic Redundancy Check) error, the payload is, none the less, written in the endpoint. The
ERR_CRC_NTR flag is set in UDPHS_EPTSTAx register.
ERR_CRC_NTR flag is set in UDPHS_EPTSTAx register.
If the endpoint is already full, the packet is not written in the DPRAM. The ERR_FL_ISO flag is set in UDPHS_EPTSTAx.
If the payload data is greater than the maximum size of the endpoint, then the ERR_OVFLW flag is set. It is the task of
the CPU to manage this error. The data packet is written in the endpoint (except the extra data).
the CPU to manage this error. The data packet is written in the endpoint (except the extra data).
If the host sends a Zero Length Packet, and the endpoint is free, no data is written in the endpoint, the RXRDY_TXKL
flag is set, and the BYTE_COUNT field in UDPHS_EPTSTAx register is null.
flag is set, and the BYTE_COUNT field in UDPHS_EPTSTAx register is null.
The FRCESTALL command bit is unused for an isochonous endpoint.
Otherwise, payload data is written in the endpoint, the RXRDY_TXKL interrupt is generated and the BYTE_COUNT in
UDPHS_EPTSTAx register is updated.
UDPHS_EPTSTAx register is updated.
32.6.10.15 STALL
STALL is returned by a function in response to an IN token or after the data phase of an OUT or in response to a PING
transaction. STALL indicates that a function is unable to transmit or receive data, or that a control pipe request is not
supported.
transaction. STALL indicates that a function is unable to transmit or receive data, or that a control pipe request is not
supported.
z
OUT
To stall an endpoint, set the FRCESTALL bit in UDPHS_EPTSETSTAx register and after the STALL_SNT flag has been
set, set the TOGGLE_SEG bit in the UDPHS_EPTCLRSTAx register.
set, set the TOGGLE_SEG bit in the UDPHS_EPTCLRSTAx register.
z
IN
Set the FRCESTALL bit in UDPHS_EPTSETSTAx register.
Figure 32-17.Stall Handshake Data OUT Transfer
Token OUT
Stall PID
Data OUT
USB Bus
Packets
Packets
Cleared by Firmware
Set by Firmware
FRCESTALL
STALL_SNT
Set by Hardware
Interrupt Pending
Cleared by Firmware