Atmel Xplained Pro Evaluation Kit ATSAM4E-XPRO ATSAM4E-XPRO Data Sheet

1233

SAM4E [DATASHEET]

Atmel-11157D-ATARM-SAM4E16-SAM4E8-Datasheet_12-Jun-14

GMAC_RSR

0x40034020

Access: Read/Write

This register, when read, provides receive status details. Once read, individual bits may be cleared by writing a one to 
them. It is not possible to set a bit to 1 by writing to the register.



An attempt was made to get a new buffer and the pointer indicated that it was owned by the processor. The DMA will re-
read the pointer each time an end of frame is received until a valid pointer is found. This bit is set following each descriptor 
read attempt that fails, even if consecutive pointers are unsuccessful and software has in the mean time cleared the status 
flag. Writing a one clears this bit.



One or more frames have been received and placed in memory. Writing a one clears this bit.



This bit is set if RX FIFO is not able to store the receive frame due to a FIFO overflow, or if the receive status was not taken 
at the end of the frame. For DMA operation, the buffer will be recovered if an overrun occurs. Writing a one clears this bit.



Set when the DMA block sees HRESP not OK. Writing a one clears this bit.

31

30

29

28

27

26

25

24

–

–

–

–

–

–

–

–

23

22

21

20

19

18

17

16

–

–

–

–

–

–

–

–

15

14

13

12

11

10

9

8

–

–

–

–

–

–

–

–

7

6

5

4

3

2

1

0

–

–

–

–

HNO

RXOVR

REC

BNA