Atmel Xplained Pro Evaluation Kit ATSAM4E-XPRO ATSAM4E-XPRO Data Sheet

Product codes
ATSAM4E-XPRO
Page of 1506
1463
SAM4E [DATASHEET]
Atmel-11157D-ATARM-SAM4E16-SAM4E8-Datasheet_12-Jun-14
47.11.7 Two-wire Serial Interface Characteristics
 describes the requirements for devices connected to the Two-wire Serial Bus. For timing symbols refer to 
Notes:
1. Required only for f
TWCK
 > 100 kHz.
2. C
B
 = capacitance of one bus line in pF. Per I2C Standard, C
Max = 400 pF
3. The TWCK low period is defined as follows: 
 
4. The TWCK high period is defined as follows: 
5. t
CP_MCK 
= MCK Bus Period. 
Table 47-63.
Two-wire Serial Bus Requirements
Symbol
Parameter
Condition
Min
Max
Units
V
IL
Low-level input voltage
-0.3
0.3 V
VDDIO
V
V
IH
High-level input voltage
0.7xV
VDDIO
V
CC
 + 0.3
V
V
HYS
Hysteresis of Schmitt Trigger Inputs
0.150
V
V
OL
Low-level output voltage
3 mA sink current
0.4
V
t
R
Rise Time for both TWD and TWCK
20 + 0.1C
300
ns
t
OF
Output Fall Time from V
IHmin
 to V
ILmax
10 pF < C
b
 < 400 pF 
20 + 0.1C
250
ns
C
i
Capacitance for each I/O Pin
10
pF
f
TWCK
TWCK Clock Frequency
0
400
kHz
R
P
Value of Pull-up resistor
f
TWCK
 
≤ 100 kHz
Ω
f
TWCK
 > 100 kHz
Ω
t
LOW
Low Period of the TWCK clock
f
TWCK
 
≤ 100 kHz
µs
f
TWCK
 > 100 kHz
µs
t
HIGH
High Period of the TWCK clock
f
TWCK
 
≤ 100 kHz
µs
f
TWCK
 > 100 kHz
µs
t
HD;STA
Hold Time (repeated) START Condition
f
TWCK
 
≤ 100 kHz
t
HIGH
µs
f
TWCK
 > 100 kHz
t
HIGH
µs
t
SU;STA
Set-up time for a repeated START condition
f
TWCK
 
≤ 100 kHz
t
HIGH
µs
f
TWCK
 > 100 kHz
t
HIGH
µs
t
HD;DAT
Data hold time
f
TWCK
 
≤ 100 kHz
0
3 x t
CP_MCK
µs
f
TWCK
 > 100 kHz
0
3 x t
CP_MCK
µs
t
SU;DAT
Data setup time
f
TWCK
 
≤ 100 kHz
t
LOW 
- 3 x 
t
CP_MCK
ns
f
TWCK
 > 100 kHz
t
LOW 
- 3 x 
t
CP_MCK
ns
t
SU;STO
Setup time for STOP condition
f
TWCK
 
≤ 100 kHz
t
HIGH
µs
f
TWCK
 > 100 kHz
t
HIGH
µs
t
HD;STA
Hold Time (repeated) START Condition
f
TWCK
 
≤ 100 kHz
t
HIGH
µs
f
TWCK
 > 100 kHz
t
HIGH
µs
V
VDDIO
0.4V
3mA
-------------------------------------
1000ns
C
b
-----------------
V
VDDIO
0.4V
3mA
-------------------------------------
300ns
C
b
--------------
t
low
CLDIV
(
2
CKDIV
×
(
) 4 )
+
t
MCK
×
=
t
high
CHDIV
(
2
CKDIV
×
(
) 4 )
+
t
MCK
×
=