Atmel Xplained Pro Evaluation Kit ATSAM4E-XPRO ATSAM4E-XPRO Data Sheet

1477

SAM4E [DATASHEET]

Atmel-11157D-ATARM-SAM4E16-SAM4E8-Datasheet_12-Jun-14

Flash read issues leading to wrong instruction fetch or incorrect data read may occur under the following operating
conditions:

VDDIO < 2.4V and Flash wait state

 

≥ 1

If the core clock frequency does not require the use of the Flash wait state 

 (FWS = 0 in EEFC_FMR), or if only

data reads are performed on the Flash (e.g., if the code is running out of SRAM), there are no constraints on
VDDIO voltage. The usable voltage range for VDDIO is defined in 

 in 

.

Notes:

1. Defined in FWS field in EEFC_FMR register.
2. See 

in 

 for the maximum core 

clock frequency at zero (0) wait state.

Problem Fix/Workaround

Two workarounds are available:



Reduce the device speed to decrease the number of wait states to 0.



Copy the code from Flash to SRAM at 0 wait states and then run the code out of SRAM.

The issue will be corrected in the next device revision, Marketing Revision Level B (MRL B). Please contact your
local Sales Representative for further details.