Atmel Xplained Pro Evaluation Kit ATSAM4E-XPRO ATSAM4E-XPRO Data Sheet

Product codes
ATSAM4E-XPRO
Page of 1506
23
SAM4E [DATASHEET]
Atmel-11157D-ATARM-SAM4E16-SAM4E8-Datasheet_12-Jun-14
6.2
System I/O Lines
System I/O lines are pins used by oscillators, test mode, reset and JTAG to name but a few. Described below in
 are the SAM4E system I/O lines shared with PIO lines.
These pins are software configurable as general purpose I/O or system pins. At start-up, the default function of
these pins is always used.
Notes:
1. If PB12 is used as PIO input in user applications, a low level must be ensured at startup to prevent Flash erase before the 
user application sets PB12 into PIO mode, 
2. In the product Datasheet Refer to: “Slow Clock Generator” of the “Supply Controller” section.
3. In the product Datasheet Refer to: “3 to 20 MHz Crystal Oscillator” information in the “PMC” section.
Table 6-1.
System I/O Configuration Pin List.
SYSTEM_IO
Bit Number
Default Function
after Reset
Other Function
Constraints 
for Normal Start
Configuration
12
ERASE
PB12
Low Level at start-up
In Matrix User Interface Registers
(Refer to the System I/O 
Configuration Register in the “Bus 
Matrix” section of this datasheet.)
7
TCK/SWCLK
PB7
-
6
TMS/SWDIO
PB6
-
5
TDO/TRACESWO
PB5
-
4
TDI
PB4
-
-
PA7
 XIN32
-
See footnote 
 below
-
PA8
 XOUT32
-
-
PB9
 XIN
-
See footnote 
 below
-
PB8
 XOUT
-