Atmel Xplained Pro Evaluation Kit ATSAM4E-XPRO ATSAM4E-XPRO Data Sheet

Product codes
ATSAM4E-XPRO
Page of 1506
SAM4E [DATASHEET]
Atmel-11157D-ATARM-SAM4E16-SAM4E8-Datasheet_12-Jun-14
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erase is performed. When the security bit is deactivated, all accesses to the Flash, SRAM, Core registers, Internal
Peripherals are permitted.
The ERASE pin integrates a permanent pull-down. Consequently, it can be left unconnected during normal
operation. However, it is recommended, in harsh environment, to connect it directly to GND if the erase operation
is not used in the application. 
To avoid unexpected erase at power-up, a minimum ERASE pin assertion time is required. This time is defined in
.
The erase operation is not performed when the system is in Wait mode with the Flash in deep-power-down mode. 
To make sure that the erase operation is performed after power-up, the system must not reconfigure the ERASE
pin as GPIO or enter Wait mode with Flash in Deep-power-down mode before the ERASE pin assertion time has
elapsed.
With the following sequence, in any case, the erase operation is performed:
1.
Assert the ERASE pin (High)
2.
Assert the NRST pin (Low)
3.
Power cycle the device
4.
Maintain the ERASE pin high for at least the minimum assertion time.
8.1.3.6 Calibration Bits
NVM bits are used to calibrate the brownout detector and the voltage regulator. These bits are factory configured
and cannot be changed by the user. The ERASE pin has no effect on the calibration bits.
8.1.3.7 Unique Identifier
Each device integrates its own 128-bit unique identifier. These bits are factory configured and cannot be changed
by the user. The ERASE pin has no effect on the unique identifier.
8.1.3.8 User Signature
Each part contains a User Signature of 512 bytes. It can be used by the user to store user information, such as
trimming, keys, etc., that the customer does not want to be erased by asserting the ERASE pin or by software
ERASE command. Read, write and erase of this area is allowed.
8.1.3.9 Fast Flash Programming Interface
The Fast Flash Programming Interface allows programming the device through a multiplexed fully-handshaked
parallel port. It allows gang programming with market-standard industrial programmers.
The FFPI supports read, page program, page erase, full erase, lock, unlock and protect commands.
The Fast Flash Programming Interface is enabled and the Fast Programming Mode is entered when TST and PA0
and PA1are tied low.
8.1.3.10 SAM-BA Boot
The SAM-BA Boot is a default Boot Program which provides an easy way to program in-situ the on-chip Flash
memory.
The SAM-BA Boot Assistant supports serial communication via the UART
The SAM-BA Boot provides an interface with SAM-BA Graphic User Interface (GUI).
The SAM-BA Boot is in ROM and is mapped in Flash at address 0x0 when GPNVM bit 1 is set to 0.
8.1.3.11 GPNVM Bits
The SAM4E device features two GPNVM bits. These bits can be cleared or set respectively through the
commands “Clear GPNVM Bit” and “Set GPNVM Bit” of the EEFC User Interface.