Atmel Xplained Pro Evaluation Kit ATSAM4E-XPRO ATSAM4E-XPRO Data Sheet
Product codes
ATSAM4E-XPRO
513
SAM4E [DATASHEET]
Atmel-11157D-ATARM-SAM4E16-SAM4E8-Datasheet_12-Jun-14
ENDTX flag is set when the PDC Transmit Counter register (PERIPH_TCR) reaches zero.
TXBUFE flag is set when both PERIPH_TCR and the PDC Transmit Next Counter register (PERIPH_TNCR)
reach zero.
reach zero.
These status flags are described in the Peripheral Status register (PERIPH_PTSR).
27.5.4 Data Transfers
The serial peripheral triggers its associated PDC channels’ transfers using transmit enable (TXEN) and receive
enable (RXEN) flags in the transfer control register integrated in the peripheral’s user interface.
enable (RXEN) flags in the transfer control register integrated in the peripheral’s user interface.
When the peripheral receives external data, it sends a Receive Ready signal to its PDC receive channel which
then requests access to the Matrix. When access is granted, the PDC receive channel starts reading the
peripheral Receive Holding register (RHR). The read data are stored in an internal buffer and then written to
memory.
then requests access to the Matrix. When access is granted, the PDC receive channel starts reading the
peripheral Receive Holding register (RHR). The read data are stored in an internal buffer and then written to
memory.
When the peripheral is about to send data, it sends a Transmit Ready to its PDC transmit channel which then
requests access to the Matrix. When access is granted, the PDC transmit channel reads data from memory and
transfers the data to the Transmit Holding register (THR) of its associated peripheral. The same peripheral sends
data depending on its mechanism.
requests access to the Matrix. When access is granted, the PDC transmit channel reads data from memory and
transfers the data to the Transmit Holding register (THR) of its associated peripheral. The same peripheral sends
data depending on its mechanism.
27.5.5 PDC Flags and Peripheral Status Register
Each peripheral connected to the PDC sends out receive ready and transmit ready flags and the PDC returns flags
to the peripheral. All these flags are only visible in the peripheral’s Status register.
to the peripheral. All these flags are only visible in the peripheral’s Status register.
Depending on whether the peripheral is half- or full-duplex, the flags belong to either one single channel or two
different channels.
different channels.
27.5.5.1 Receive Transfer End
The receive transfer end flag is set when PERIPH_RCR reaches zero and the last data has been transferred to
memory.
memory.
This flag is reset by writing a non-zero value to PERIPH_RCR or PERIPH_RNCR.
27.5.5.2 Transmit Transfer End
The transmit transfer end flag is set when PERIPH_TCR reaches zero and the last data has been written to the
peripheral THR.
peripheral THR.
This flag is reset by writing a non-zero value to PERIPH_TCR or PERIPH_TNCR.
27.5.5.3 Receive Buffer Full
The receive buffer full flag is set when PERIPH_RCR reaches zero, with PERIPH_RNCR also set to zero and the
last data transferred to memory.
last data transferred to memory.
This flag is reset by writing a non-zero value to PERIPH_TCR or PERIPH_TNCR.
27.5.5.4 Transmit Buffer Empty
The transmit buffer empty flag is set when PERIPH_TCR reaches zero, with PERIPH_TNCR also set to zero and
the last data written to peripheral THR.
the last data written to peripheral THR.
This flag is reset by writing a non-zero value to PERIPH_TCR or PERIPH_TNCR.