Atmel Xplained Pro Evaluation Kit ATSAM4E-XPRO ATSAM4E-XPRO Data Sheet

Product codes
ATSAM4E-XPRO
Page of 1506
SAM4E [DATASHEET]
Atmel-11157D-ATARM-SAM4E16-SAM4E8-Datasheet_12-Jun-14
664
the phase error is negative, then PHASE_SEG2 is shortened by an amount equal to the resynchronization 
jump width.
Figure 33-6.
CAN Resynchronization
Autobaud Mode
The autobaud feature is enabled by setting the ABM field in the CAN_MR. In this mode, the CAN controller is only
listening to the line without acknowledging the received messages. It can not send any message. The errors flags
are updated. The bit timing can be adjusted until no error occurs (good configuration found). In this mode, the error
counters are frozen. To go back to the standard mode, the ABM bit must be cleared in the CAN_MR.
33.7.4.2   Error Detection
There are five different error types that are not mutually exclusive. Each error concerns only specific fields of the
CAN data frame (refer to the Bosch CAN specification for their correspondence):
CRC error (CERR bit in the CAN_SR): With the CRC, the transmitter calculates a checksum for the CRC bit 
sequence from the Start of Frame bit until the end of the Data Field. This CRC sequence is transmitted in the 
CRC field of the Data or Remote Frame.
Bit-stuffing error (SERR bit in the CAN_SR): If a node detects a sixth consecutive equal bit level during the 
bit-stuffing area of a frame, it generates an Error Frame starting with the next bit-time.
Bit error (BERR bit in CAN_SR): A bit error occurs if a transmitter sends a dominant bit but detects a 
recessive bit on the bus line, or if it sends a recessive bit but detects a dominant bit on the bus line. An error 
frame is generated and starts with the next bit time.
Form Error (FERR bit in the CAN_SR): If a transmitter detects a dominant bit in one of the fix-formatted 
segments CRC Delimiter, ACK Delimiter or End of Frame, a form error has occurred and an error frame is 
generated.
Acknowledgment error (AERR bit in the CAN_SR): The transmitter checks the Acknowledge Slot, which is 
transmitted by the transmitting node as a recessive bit, contains a dominant bit. If this is the case, at least 
SYNC_
SEG
PROP_SEG
PHASE_SEG1 PHASE_SEG2
SYNC_
SEG
PROP_SEG
PHASE_SEG1
PHASE_SEG2
Phase error
Phase error (max Tsjw)
SYNC_
SEG
SYNC_
SEG
SYNC_
SEG
PROP_SEG
PHASE_SEG1
PHASE_SEG2
SYNC_
SEG
PHASE_SEG2
SYNC_
SEG
PROP_SEG
PHASE_SEG1
PHASE_
SEG2
SYNC_
SEG
PHASE_SEG2
Phase error
Nominal
Sample point
Sample point
after resynchronization
Nominal
Sample point
Sample point
after resynchronization
THE PHASE ERROR IS POSITIVE
(the transmitter is slower than the receiver)
Received
data bit
Received
data bit
Nominal bit time
(before resynchronization)
Bit time with
resynchronization
Bit time with
resynchronization
Phase error (max Tsjw)
Nominal bit time
(before resynchronization)
THE PHASE ERROR IS NEGATIVE
(the transmitter is faster than the receiver)