Atmel Xplained Pro Evaluation Kit ATSAM4E-XPRO ATSAM4E-XPRO Data Sheet

SAM4E [DATASHEET]

Atmel-11157D-ATARM-SAM4E16-SAM4E8-Datasheet_12-Jun-14

982

This does not substitute the measurements of the number of pulses between two index pulses (if available) but
provides a complementary method to detect damaged quadrature devices.

Each channel can be independently configured to generate a 2-bit gray count waveform on corresponding TIOA,
TIOB outputs by means of the GCEN bit in TC_SMMRx.

Up or Down count can be defined by writing bit DOWN in TC_SMMRx.

It is mandatory to configure the channel in WAVE mode in the TC_CMR.

The period of the counters can be programmed in TC_RCx.

To prevent any single software error from corrupting TC behavior, certain registers in the address space can be
write-protected by setting the WPEN bit in the 

 (TC_WPMR).

At anytime, the TC_RCx registers can be used to perform a comparison on the respective current channel counter
value (TC_CVx) with the value of TC_RCx register.

The CPCSx flags can be set accordingly and an interrupt can be generated.

This interrupt is processed but requires an unpredictable amount of time to be achieve the required action.

It is possible to trigger the FAULT output of the TIMER1 with CPCS from TC_SR0 and/or CPCS from TC_SR1.
Each source can be independently enabled/disabled in the TC_FMR.

This can be useful to detect an overflow on speed and/or position when QDEC is processed and to act
immediately by using the FAULT output.

TIOAx

TIOBx 

DOWNx

TC_RCx

WAVEx = GCENx =1 

The following registers can be write-protected:

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