Atmel Evaluation Kit AT91SAM9X25-EK AT91SAM9X25-EK Data Sheet

Product codes
AT91SAM9X25-EK
Page of 1151
1099
SAM9X25 [DATASHEET]
11054E–ATARM–10-Mar-2014
46.9 PLL Characteristics
The following configuration of bit PMC_PLLICPR.ICPLLA and field CKGR_PLLAR.OUTA must be done for each PLLA frequency 
range.
46.9.1 UTMI PLL Characteristics 
Table 46-15. PLLA Characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
f
OUT
Output Frequency
Refer to following table
400
800
MHz
f
IN
Input Frequency
2
32
MHz
I
PLL
Current Consumption
Active mode
7
9
mA
Standby mode
1
µA
t
ST
Startup Time
50
µs
Table 46-16. PLLA Frequency Regarding ICPLLA and OUTA
PLL Frequency Range (MHz)
PMC_PLLICPR.ICPLLA Value
CKGR_PLLAR.OUTA Value
745–800
0
00
695–750
0
01
645–700
0
10
595–650
0
11
545–600
1
00
495–550
1
01
445–500
1
10
400–450
1
11
Table 46-17. Phase Lock Loop Characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
f
IN
Input Frequency
4
12
32
MHz
f
OUT
Output Frequency
450
480
600
MHz
I
PLL
Current Consumption
Active mode
5
8
mA
Standby mode
1.5
µA
t
ST
Startup Time
50
µs