Atmel Evaluation Kit AT91SAM9X25-EK AT91SAM9X25-EK Data Sheet

Product codes
AT91SAM9X25-EK
Page of 1151
547
SAM9X25 [DATASHEET]
11054E–ATARM–10-Mar-2014
Algorithm to Fill Several Packets:
The application enables the interrupts of BUSY_BANK and AUTO_VALID.
When a BUSY_BANK interrupt is received, the application knows that all banks available for the endpoint have 
been filled. Thus, the application can read all banks available.
If the application doesn’t know the size of the receive buffer, instead of using the BUSY_BANK interrupt, the application 
must use RXRDY_TXKL.
32.6.10.12 Bulk OUT or Interrupt OUT: Sending a Buffer Using DMA (Host To Device)
To use the DMA setting, the AUTO_VALID field is mandatory.
 for more information. 
DMA Configuration Example:
1.
First program UDPHS_DMAADDRESSx with the address of the buffer that should be transferred.
2.
Enable the interrupt of the DMA in UDPHS_IEN
3.
Program the DMA Channelx Control Register:
Size of buffer to be sent.
END_B_EN: Can be used for OUT packet truncation (discarding of unbuffered packet data) at the end of 
DMA buffer.
END_BUFFIT: Generate an interrupt when BUFF_COUNT in the UDPHS_DMASTATUSx register 
reaches 0.
END_TR_EN: End of transfer enable, the UDPHS device can put an end to the current DMA transfer, in 
case of a short packet.
END_TR_IT: End of transfer interrupt enable, an interrupt is sent after the last USB packet has been 
transferred by the DMA, if the USB transfer ended with a short packet. (Beneficial when the receive size is 
unknown.)
CHANN_ENB: Run and stop at end of buffer.
For OUT transfer, the bank will be automatically cleared by hardware when the application has read all the bytes in the 
bank (the bank is empty).
Notes: 1. When a zero-length-packet is received, RXRDY_TXKL bit in UDPHS_EPTSTAx is cleared automatically by 
AUTO_VALID, and the application knows of the end of buffer by the presence of the END_TR_IT.
2. If the host sends a zero-length packet, and the endpoint is free, then the device sends an ACK. No data is 
written in the endpoint, the RXRDY_TXKL interrupt is generated, and the BYTE_COUNT field in 
UDPHS_EPTSTAx is null.
Figure 32-14.Data OUT Transfer for Endpoint with One Bank 
ACK
Token OUT
NAK
Token OUT
ACK
Token OUT
Data OUT 1
USB Bus
Packets
RXRDY
Set by Hardware
Cleared by Firmware,
Data Payload Written in FIFO
FIFO (DPR)
Content
Written by UDPHS Device
Microcontroller Read
Data OUT 1 
Data OUT 1 
Data OUT 2
Host Resends the Next Data Payload
Microcontroller Transfers Data
Host Sends Data Payload
Data OUT 2
Data OUT 2
Host Sends the Next Data Payload
Written by UDPHS Device
(UDPHS_EPTSTAx)
Interrupt Pending