Atmel Evaluation Kit AT91SAM9X25-EK AT91SAM9X25-EK Data Sheet
Product codes
AT91SAM9X25-EK
80
SAM9X25 [DATASHEET]
11054E–ATARM–10-Mar-2014
The Fast Forcing feature does not affect the Source 0 pending bit in the Interrupt Pending Register (AIC_IPR).
The FIQ Vector Register (AIC_FVR) reads the contents of the Source Vector Register 0 (AIC_SVR0), whatever the
source of the fast interrupt may be. The read of the FVR does not clear the Source 0 when the fast forcing feature is used
and the interrupt source should be cleared by writing to the Interrupt Clear Command Register (AIC_ICCR).
source of the fast interrupt may be. The read of the FVR does not clear the Source 0 when the fast forcing feature is used
and the interrupt source should be cleared by writing to the Interrupt Clear Command Register (AIC_ICCR).
All enabled and pending interrupt sources that have the fast forcing feature enabled and that are programmed in edge-
triggered mode must be cleared by writing to the Interrupt Clear Command Register. In doing so, they are cleared
independently and thus lost interrupts are prevented.
triggered mode must be cleared by writing to the Interrupt Clear Command Register. In doing so, they are cleared
independently and thus lost interrupts are prevented.
The read of AIC_IVR does not clear the source that has the fast forcing feature enabled.
The source 0, reserved to the fast interrupt, continues operating normally and becomes one of the Fast Interrupt sources.
Figure 13-10.Fast Forcing
13.8.5 Protect Mode
The Protect Mode permits reading the Interrupt Vector Register without performing the associated automatic operations.
This is necessary when working with a debug system. When a debugger, working either with a Debug Monitor or the
ARM processor's ICE, stops the applications and updates the opened windows, it might read the AIC User Interface and
thus the IVR. This has undesirable consequences:
This is necessary when working with a debug system. When a debugger, working either with a Debug Monitor or the
ARM processor's ICE, stops the applications and updates the opened windows, it might read the AIC User Interface and
thus the IVR. This has undesirable consequences:
If an enabled interrupt with a higher priority than the current one is pending, it is stacked.
If there is no enabled pending interrupt, the spurious vector is returned.
In either case, an End of Interrupt command is necessary to acknowledge and to restore the context of the AIC. This
operation is generally not performed by the debug system as the debug system would become strongly intrusive and
cause the application to enter an undesired state.
operation is generally not performed by the debug system as the debug system would become strongly intrusive and
cause the application to enter an undesired state.
This is avoided by using the Protect Mode. Writing PROT in AIC_DCR (Debug Control Register) at 0x1 enables the
Protect Mode.
Protect Mode.
When the Protect Mode is enabled, the AIC performs interrupt stacking only when a write access is performed on the
AIC_IVR. Therefore, the Interrupt Service Routines must write (arbitrary data) to the AIC_IVR just after reading it. The
new context of the AIC, including the value of the Interrupt Status Register (AIC_ISR), is updated with the current
interrupt only when AIC_IVR is written.
AIC_IVR. Therefore, the Interrupt Service Routines must write (arbitrary data) to the AIC_IVR just after reading it. The
new context of the AIC, including the value of the Interrupt Status Register (AIC_ISR), is updated with the current
interrupt only when AIC_IVR is written.
An AIC_IVR read on its own (e.g., by a debugger), modifies neither the AIC context nor the AIC_ISR. Extra AIC_IVR
reads perform the same operations. However, it is recommended to not stop the processor between the read and the
write of AIC_IVR of the interrupt service routine to make sure the debugger does not modify the AIC context.
reads perform the same operations. However, it is recommended to not stop the processor between the read and the
write of AIC_IVR of the interrupt service routine to make sure the debugger does not modify the AIC context.
Source 0
_
FIQ
Input Stage
Automatic Clear
Input Stage
Automatic Clear
Source n
AIC_IPR
AIC_IMR
AIC_FFSR
AIC_IPR
AIC_IMR
Priority
Manager
nFIQ
nIRQ
Read IVR if Source n is the current interrupt
and if Fast Forcing is disabled on Source n.
and if Fast Forcing is disabled on Source n.
Read FVR if Fast Forcing is
disabled on Sources 1 to 31.
disabled on Sources 1 to 31.