Atmel Evaluation Kit AT91SAM9X25-EK AT91SAM9X25-EK Data Sheet
Product codes
AT91SAM9X25-EK
835
SAM9X25 [DATASHEET]
11054E–ATARM–10-Mar-2014
Slave Node Configuration
In this configuration, the DMAC transfers only the DATA. The Identifier must be read by the user in the LIN Identifier
register (US_LINIR). The LIN mode must be written by the user in the LIN Mode register (US_LINMR).
register (US_LINIR). The LIN mode must be written by the user in the LIN Mode register (US_LINMR).
The WRITE buffer contains the DATA if the USART sends the response (NACT=PUBLISH).
The READ buffer contains the DATA if the USART receives the response (NACT=SUBSCRIBE).
Figure 39-53.Slave Node with DMAC
39.7.8.17 Wake-up Request
Any node in a sleeping LIN cluster may request a wake-up.
In the LIN 2.0 specification, the wakeup request is issued by forcing the bus to the dominant state from 250 µs to 5 ms.
For this, it is necessary to send the character 0xF0 in order to impose 5 successive dominant bits. Whatever the baud
rate is, this character respects the specified timings.
For this, it is necessary to send the character 0xF0 in order to impose 5 successive dominant bits. Whatever the baud
rate is, this character respects the specified timings.
Baud rate min = 1 kbit/s -> Tbit = 1ms -> 5 Tbits = 5 ms
Baud rate max = 20 kbit/s -> Tbi t= 50 µs -> 5 Tbits = 250 µs
In the LIN 1.3 specification, the wakeup request should be generated with the character 0x80 in order to impose 8
successive dominant bits.
successive dominant bits.
The user can choose by the WKUPTYP bit in the LIN Mode register (US_LINMR) either to send a LIN 2.0 wakeup
request (WKUPTYP=0) or to send a LIN 1.3 wakeup request (WKUPTYP=1).
request (WKUPTYP=0) or to send a LIN 1.3 wakeup request (WKUPTYP=1).
A wake-up request is transmitted by writing the Control Register (US_CR) with the LINWKUP bit to 1. Once the transfer
is completed, the LINTC flag is asserted in the Status Register (US_SR). It is cleared by writing the Control Register
(US_CR) with the RSTSTA bit to 1.
is completed, the LINTC flag is asserted in the Status Register (US_SR). It is cleared by writing the Control Register
(US_CR) with the RSTSTA bit to 1.
39.7.8.18 Bus Idle Time-out
If the LIN bus is inactive for a certain duration, the slave nodes shall automatically enter in sleep mode. In the LIN 2.0
specification, this time-out is fixed at 4 seconds. In the LIN 1.3 specification, it is fixed at 25000 Tbits.
specification, this time-out is fixed at 4 seconds. In the LIN 1.3 specification, it is fixed at 25000 Tbits.
In Slave Node configuration, the Receiver Time-out detects an idle condition on the RXD line. When a time-out is
detected, the bit TIMEOUT in the Channel Status Register (US_CSR) rises and can generate an interrupt, thus indicating
to the driver to go into sleep mode.
detected, the bit TIMEOUT in the Channel Status Register (US_CSR) rises and can generate an interrupt, thus indicating
to the driver to go into sleep mode.
The time-out delay period (during which the receiver waits for a new character) is programmed in the TO field of the
Receiver Time-out Register (US_RTOR). If the TO field is programmed to 0, the Receiver Time-out is disabled and no
time-out is detected. The TIMEOUT bit in US_CSR remains to 0. Otherwise, the receiver loads a 17-bit counter with the
value programmed in TO. This counter is decremented at each bit period and reloaded each time a new character is
received. If the counter reaches 0, the TIMEOUT bit in the Status Register rises.
Receiver Time-out Register (US_RTOR). If the TO field is programmed to 0, the Receiver Time-out is disabled and no
time-out is detected. The TIMEOUT bit in US_CSR remains to 0. Otherwise, the receiver loads a 17-bit counter with the
value programmed in TO. This counter is decremented at each bit period and reloaded each time a new character is
received. If the counter reaches 0, the TIMEOUT bit in the Status Register rises.
If STTTO is performed, the counter clock is stopped until a first character is received.
If RETTO is performed, the counter starts counting down immediately from the value TO
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DATA 0
DATA N
RXRDY
USART3
LIN CONTROLLER
APB bus
READ BUFFER
NACT = SUBSCRIBE
DATA 0
DATA N
TXRDY
USART3
LIN CONTROLLER
APB bus
WRITE BUFFER
(Peripheral) DMA
Controller
(Peripheral) DMA
Controller