Atmel Evaluation Kit AT91SAM9X25-EK AT91SAM9X25-EK Data Sheet

936

SAM9X25 [DATASHEET]

11054E–ATARM–10-Mar-2014

CAN_TIMESTP

0xF800001C (0), 0xF800401C (1)

Read-only

This field carries the value of the internal CAN controller 16-bit timer value at the start or end of frame.

If the TEOF bit is cleared in the CAN_MR register, the internal Timer Counter value is captured in the MTIMESTAMP field at each 
start of frame else the value is captured at each end of frame. When the value is captured, the TSTP flag is set in the CAN_SR 
register. If the TSTP mask in the CAN_IMR register is set, an interrupt is generated while TSTP flag is set in the CAN_SR regis-
ter. This flag is cleared by reading the CAN_SR register.
Note:

The CAN_TIMESTP register is reset when the CAN is disabled then enabled thanks to the CANEN bit in the 
CAN_MR.

31

30

29

28

27

26

25

24

–

–

–

–

–

–

–

–

23

22

21

20

19

18

17

16

–

–

–

–

–

–

–

–

15

14

13

12

11

10

9

8

MTIMESTAMP

7

6

5

4

3

2

1

0

MTIMESTAMP