Atmel SAM4L Xplained Pro Starter Kit Atmel ATSAM4L-XSTK ATSAM4L-XSTK Data Sheet
Product codes
ATSAM4L-XSTK
43
42023ES–SAM–07/2013
ATSAM4L8/L4/L2
5.2
Embedded Memories
•
Internal high-speed flash
– 512Kbytes (ATSAM4Lx8)
– 256Kbytes (ATSAM4Lx4)
– 128Kbytes (ATSAM4Lx2)
• Pipelined flash architecture, allowing burst reads from sequential flash locations, hiding
penalty of 1 wait state access
• Pipelined flash architecture typically reduces the cycle penalty of 1 wait state operation
compared to 0 wait state operation
• 100 000 write cycles, 15-year data retention capability
• Sector lock capabilities, bootloader protection, security bit
• 32 fuses, erased during chip erase
• User page for data to be preserved during chip erase
•
Internal high-speed SRAM, single-cycle access at full speed
– 64Kbytes (ATSAM4Lx8)
– 32Kbytes (ATSAM4Lx4, ATSAM4Lx2)
5.3
Physical Memory Map
The system bus is implemented as a bus matrix. All system bus addresses are fixed, and they
are never remapped in any way, not even during boot. The 32-bit physical address space is
mapped as follows:
are never remapped in any way, not even during boot. The 32-bit physical address space is
mapped as follows:
Table 5-1.
ATSAM4L8/L4/L2 Physical Memory Map
Memory
Start Address
Size
Size
ATSAM4Lx4
ATSAM4Lx2
Embedded Flash
0x00000000
256Kbytes
128Kbytes
Embedded SRAM
0x20000000
32Kbytes
32Kbytes
Cache SRAM
0x21000000
4Kbytes
4Kbytes
Peripheral Bridge A
0x40000000
64Kbytes
64Kbytes
Peripheral Bridge B
0x400A0000
64Kbytes
64Kbytes
AESA
0x400B0000
256 bytes
256 bytes
Peripheral Bridge C
0x400E0000
64Kbytes
64Kbytes
Peripheral Bridge D
0x400F0000
64Kbytes
64Kbytes
Memory
Start Address
Size
ATSAM4Lx8
Embedded Flash
0x00000000
512Kbytes
Embedded SRAM
0x20000000
64Kbytes
Cache SRAM
0x21000000
4Kbytes
Peripheral Bridge A
0x40000000
64Kbytes
Peripheral Bridge B
0x400A0000
64Kbytes