Atmel Evaluation Kit AT91SAM9G25-EK AT91SAM9G25-EK Data Sheet

Product codes
AT91SAM9G25-EK
Page of 1165
112
SAM9G25 [DATASHEET]
11032D–ATARM–10-Mar-2014
14.
Reset Controller (RSTC)
14.1
 Description
The Reset Controller (RSTC), based on power-on reset cells, handles all the resets of the system without any external 
components. It reports which reset occurred last. 
The Reset Controller also drives independently or simultaneously the external reset and the peripheral and processor 
resets.
14.2
Embedded Characteristics
Manages All Resets of the System, Including 
External Devices Through the NRST Pin
Processor Reset
Peripheral Set Reset
Backed-up Peripheral Reset 
Based on 
2
 Embedded Power-on Reset Cells
Reset Source Status
Status of the Last Reset
Either General Reset, Wake-up Reset, Software Reset, User Reset, Watchdog Reset
External Reset Signal Shaping 
AMBA
-compliant Interface 
Interfaces to the ARM
®
 Advanced Peripheral Bus