Atmel Evaluation Kit AT91SAM9G25-EK AT91SAM9G25-EK Data Sheet

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SAM9G25 [DATASHEET]

11032D–ATARM–10-Mar-2014

The bus Matrix arbitration scheme is organized in priority pools.

Round-robin priority is used in the highest and lowest priority pools, whereas fixed level priority is used between priority 
pools and in the intermediate priority pools.

For each slave, each master is assigned to one of the slave priority pools through the priority registers for slaves (MxPR 
fields of MATRIX_PRAS and MATRIX_PRBS). When evaluating master requests, this programmed priority level always 
takes precedence.

After reset, all the masters belong to the lowest priority pool (MxPR = 0) and are therefore granted bus access in a true 
round-robin order.

The highest priority pool must be specifically reserved for masters requiring very low access latency. If more than one 
master belongs to this pool, they will be granted bus access in a biased round-robin manner which allows tight and 
deterministic maximum access latency from AHB bus requests. At worst, any currently occurring high-priority master 
request will be granted after the current bus master access has ended and other high priority pool master requests, if 
any, have been granted once each.

The lowest priority pool shares the remaining bus bandwidth between AHB Masters.

Intermediate priority pools allow fine priority tuning. Typically, a moderately latency-critical master or a bandwidth-only 
critical master will use such a priority level. The higher the priority level (MxPR value), the higher the master priority.

All combinations of MxPR values are allowed for all masters and slaves. For example some masters might be assigned 
to the highest priority pool (round-robin) and the remaining masters to the lowest priority pool (round-robin), with no 
master for intermediate fix priority levels.

If more than one master requests the slave bus, irregardless of the respective masters priorities, no master will be 
granted the slave bus for two consecutive runs. A master can only get back-to-back grants so long as it is the only 
requesting master.

Fixed priority arbitration algorithm is the first and only arbitration algorithm applied between masters from distinct priority 
pools. It is also used in priority pools other than the highest and lowest priority pools (intermediate priority pools).

Fixed priority arbitration allows the Bus Matrix arbiters to dispatch the requests from different masters to the same slave 
by using the fixed priority defined by the user in the MxPR field for each master in the Priority Registers, MATRIX_PRAS 
and MATRIX_PRBS. If two or more master requests are active at the same time, the master with the highest priority 
MxPR number is serviced first.

In intermediate priority pools, if two or more master requests with the same priority are active at the same time, the 
master with the highest number is serviced first.

This algorithm is only used in the highest and lowest priority pools. It allows the Bus Matrix arbiters to properly dispatch 
requests from different masters to the same slave. If two or more master requests are active at the same time in the 
priority pool, they are serviced in a round-robin increasing master number order.