Atmel Evaluation Kit AT91SAM9G25-EK AT91SAM9G25-EK Data Sheet

Product codes
AT91SAM9G25-EK
Page of 1165
541
SAM9G25 [DATASHEET]
11032D–ATARM–10-Mar-2014
32.4
Typical Connection
Figure 32-2. Board Schematic 
Note:
The values shown on the 22 k
Ω and 15 kΩ resistors are only valid with 3V3 supplied PIOs. 
Both 39
Ω resistors need to be placed as close to the device pins as possible.
32.5
Product Dependencies
32.5.1 Power Management
The UDPHS is not continuously clocked.
For using the UDPHS, the programmer must first enable the UDPHS Clock in the Power Management Controller 
(PMC_PCER register). Then enable the PLL (PMC_UCKR register). 
However, if the application does not require UDPHS operations, the UDPHS clock can be stopped when not needed and 
restarted later.
32.5.2 Interrupt
The UDPHS interrupt line is connected on one of the internal sources of the Interrupt Controller. Using the UDPHS 
interrupt requires the Interrupt Controller to be programmed first.
PIO (VBUS DETECT)
DHSDP
DHSDM
DFSDM
DFSDP
VBG
GNDUTMI
C
RPB
:1µF to 10µF
C
RPB
1
4
2
3
10 pF
"B" Receptacle
1 = VBUS
2 = D-
3 = D+
4 = GND
Ω
Ω
Shell = Shield
15k 
22k
39 ± 1% 
Ω
39 ± 1% 
Ω
6K8 ± 1% 
Ω
(1)
(1)
Table 32-1. Peripheral IDs
Instance
ID
UDPHS
23