Atmel Evaluation Kit AT91SAM9G25-EK AT91SAM9G25-EK Data Sheet
Product codes
AT91SAM9G25-EK
644
SAM9G25 [DATASHEET]
11032D–ATARM–10-Mar-2014
34.13 Write Protection Registers
To prevent any single software error that may corrupt HSMCI behavior, the entire HSMCI address space from address
offset 0x000 to 0x00FC can be write-protected by setting the WPEN bit in the
offset 0x000 to 0x00FC can be write-protected by setting the WPEN bit in the
(HSMCI_WPMR).
If a write access to anywhere in the HSMCI address space from address offset 0x000 to 0x00FC is detected, then the
WPVS flag in the HSMCI Write Protect Status Register (HSMCI_WPSR) is set and the field WPVSRC indicates in which
register the write access has been attempted.
WPVS flag in the HSMCI Write Protect Status Register (HSMCI_WPSR) is set and the field WPVSRC indicates in which
register the write access has been attempted.
The WPVS flag is reset by writing the HSMCI Write Protect Mode Register (HSMCI_WPMR) with the appropriate access
key, WPKEY.
key, WPKEY.
The protected registers are: