Atmel SAM4S Xplained Pro Starter Kit Atmel ATSAM4S-XSTK ATSAM4S-XSTK Data Sheet

Product codes
ATSAM4S-XSTK
Page of 1125
 407
SAM4S [DATASHEET]
11100E–ATARM–24-Jul-13
26.10.3.2Slow Clock Mode Transition
A Reload Configuration Wait State is also inserted when the Slow Clock Mode is entered or exited, after the end of the
current transfer (see 
).
26.10.4 Read to Write Wait State
Due to an internal mechanism, a wait cycle is always inserted between consecutive read and write SMC accesses. 
This wait cycle is referred to as a read to write wait state in this document.
This wait cycle is applied in addition to chip select and reload user configuration wait states when they are to be inserted.
See