Atmel SAM4S Xplained Pro Starter Kit Atmel ATSAM4S-XSTK ATSAM4S-XSTK Data Sheet

Product codes
ATSAM4S-XSTK
Page of 1125
 453
SAM4S [DATASHEET]
11100E–ATARM–24-Jul-13
When disabling the Main Clock by clearing the MOSCRCEN bit in CKGR_MOR, the MOSCRCS bit in 
the Power Management Controller Status Register (PMC_SR) is automatically cleared, indicating the 
Main Clock is off.
Setting the MOSCRCS bit in the Power Management Controller Interrupt Enable Register (PMC_IER) 
can trigger an interrupt to the processor.
It is recommended to disable the Main Clock as soon as the processor no longer uses it and runs out 
of SLCK.
The CAL12, CAL8 and CAL4 values in the PMC Oscillator Calibration Register (PMC_OCR) are the 
default values set by Atmel during production. These values are stored in a specific Flash memory 
area different from the main memory plane. These values cannot be modified by the user and cannot 
be erased by a Flash erase command or by the ERASE pin. Values written by the user's application 
in PMC_OCR are reset after each power up or peripheral reset.
28.1.5.2 Fast RC Oscillator Clock Frequency Adjustment
It is possible for the user to adjust the main RC oscillator frequency through PMC_OCR. By default, 
SEL12/8/4 are low, so the RC oscillator will be driven with Flash calibration bits which are 
programmed during chip production.
The user can adjust the trimming of the 12/8/4 MHz Fast RC Oscillator through this register in order to 
obtain more accurate frequency (to compensate derating factors such as temperature and voltage). 
In order to calibrate the oscillator lower frequency, SEL12 must be set to 1 and a good frequency 
value must be configured in CAL12. Likewise, SEL8/4 must be set to 1 and a trim value must be 
configured in CAL8/4 in order to adjust the other frequencies of the oscillator.
It is possible to adjust the oscillator frequency while operating from this clock. For example, when 
running on lowest frequency it is possible to change the CAL12 value if SEL12 is set in PMC_OCR.
It is possible to restart, at anytime, a measurement of the main frequency by means of the RCMEAS 
bit in Main Clock Frequency Register (CKGR_MCFR). Thus, when MAINFRDY flag reads 1, another 
read access on Main Clock Frequency Register (CKGR_MCFR) provides an image of the frequency 
of the main clock on MAINF field. The software can calculate the error with an expected frequency 
and correct the CAL12 (or CAL8/CAL4) field accordingly. This may be used to compensate frequency 
drift due to derating factors such as temperature and/or voltage.
28.1.5.3 3 to 20 MHz Crystal or Ceramic Resonator-based Oscillator
After reset, the 3 to 20 MHz Crystal or Ceramic Resonator-based oscillator is disabled and it is not 
selected as the source of MAINCK.
The user can select the 3 to 20 MHz Crystal or Ceramic Resonator-based oscillator to be the source 
of MAINCK, as it provides a more accurate frequency. The software enables or disables the main 
oscillator so as to reduce power consumption by clearing the MOSCXTEN bit in the Main Oscillator 
Register (CKGR_MOR). 
When disabling the main oscillator by clearing the MOSCXTEN bit in CKGR_MOR, the MOSCXTS bit 
in PMC_SR is automatically cleared, indicating the Main Clock is off.
When enabling the main oscillator, the user must initiate the main oscillator counter with a value 
corresponding to the start-up time of the oscillator. This start-up time depends on the crystal 
frequency connected to the oscillator.
When the MOSCXTEN bit and the MOSCXTST are written in CKGR_MOR to enable the main 
oscillator, the XIN and XOUT pins are automatically switched into oscillator mode and MOSCXTS bit 
in the Power Management Controller Status Register (PMC_SR) is cleared and the counter starts 
counting down on the slow clock divided by 8 from the MOSCXTST value. Since the MOSCXTST 
value is coded with 8 bits, the maximum start-up time is about 62 ms.