Atmel SAM4S Xplained Pro Starter Kit Atmel ATSAM4S-XSTK ATSAM4S-XSTK Data Sheet
Product codes
ATSAM4S-XSTK
706
SAM4S [DATASHEET]
11100E–ATARM–24-Jul-13
Figure 35-20.Synchronous Mode Character Reception
35.7.3.7 Receiver Operations
When a character reception is completed, it is transferred to the Receive Holding Register (US_RHR) and the RXRDY bit
in the Status Register (US_CSR) rises. If a character is completed while the RXRDY is set, the OVRE (Overrun Error) bit
is set. The last character is transferred into US_RHR and overwrites the previous one. The OVRE bit is cleared by writing
the Control Register (US_CR) with the RSTSTA (Reset Status) bit to 1.
in the Status Register (US_CSR) rises. If a character is completed while the RXRDY is set, the OVRE (Overrun Error) bit
is set. The last character is transferred into US_RHR and overwrites the previous one. The OVRE bit is cleared by writing
the Control Register (US_CR) with the RSTSTA (Reset Status) bit to 1.
Figure 35-21.Receiver Status
35.7.3.8 Parity
The USART supports five parity modes selected by programming the PAR field in the Mode Register (US_MR). The PAR
field also enables the Multidrop mode, see
field also enables the Multidrop mode, see
. Even and odd parity bit generation and error
detection are supported.
If even parity is selected, the parity generator of the transmitter drives the parity bit to 0 if a number of 1s in the character
data bit is even, and to 1 if the number of 1s is odd. Accordingly, the receiver parity checker counts the number of
received 1s and reports a parity error if the sampled parity bit does not correspond. If odd parity is selected, the parity
generator of the transmitter drives the parity bit to 1 if a number of 1s in the character data bit is even, and to 0 if the
number of 1s is odd. Accordingly, the receiver parity checker counts the number of received 1s and reports a parity error
if the sampled parity bit does not correspond. If the mark parity is used, the parity generator of the transmitter drives the
parity bit to 1 for all characters. The receiver parity checker reports an error if the parity bit is sampled to 0. If the space
parity is used, the parity generator of the transmitter drives the parity bit to 0 for all characters. The receiver parity
data bit is even, and to 1 if the number of 1s is odd. Accordingly, the receiver parity checker counts the number of
received 1s and reports a parity error if the sampled parity bit does not correspond. If odd parity is selected, the parity
generator of the transmitter drives the parity bit to 1 if a number of 1s in the character data bit is even, and to 0 if the
number of 1s is odd. Accordingly, the receiver parity checker counts the number of received 1s and reports a parity error
if the sampled parity bit does not correspond. If the mark parity is used, the parity generator of the transmitter drives the
parity bit to 1 for all characters. The receiver parity checker reports an error if the parity bit is sampled to 0. If the space
parity is used, the parity generator of the transmitter drives the parity bit to 0 for all characters. The receiver parity
D0
D1
D2
D3
D4
D5
D6
D7
RXD
Start
Sampling
Parity Bit
Stop Bit
Example: 8-bit, Parity Enabled 1 Stop
Baud Rate
Clock
D0
D1
D2
D3
D4
D5
D6
D7
RXD
Start
Bit
Parity
Bit
Stop
Bit
Baud Rate
Clock
Write
US_CR
RXRDY
OVRE
D0
D1
D2
D3
D4
D5
D6
D7
Start
Bit
Parity
Bit
Stop
Bit
RSTSTA = 1
Read
US_RHR