Atmel Xplained Pro Evaluation Kit ATSAMD20-XPRO ATSAMD20-XPRO Data Sheet
Product codes
ATSAMD20-XPRO
166
Atmel | SMART SAM D20 [DATASHEET]
Atmel-42129K–SAM-D20_datasheet–06/2014
16.8.10 DFLL48M Control
Name:
DFLLCTRL
Offset:
0x24
Reset:
0x0080
Property:
Write-Protected, Write-Synchronized
z
Bits 15:10 – Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to
zero when this register is written. These bits will always return zero when read.
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to
zero when this register is written. These bits will always return zero when read.
z
Bit 9 – QLDIS: Quick Lock Disable
0: Quick Lock is enabled.
0: Quick Lock is enabled.
1: Quick Lock is disabled.
z
Bit 8 – CCDIS: Chill Cycle Disable
0: Chill Cycle is enabled.
0: Chill Cycle is enabled.
1: Chill Cycle is disabled.
z
Bit 7 – ONDEMAND: On Demand Control
The On Demand operation mode allows an oscillator to be enabled or disabled depending on peripheral clock
requests.
The On Demand operation mode allows an oscillator to be enabled or disabled depending on peripheral clock
requests.
In On Demand operation mode, i.e., if the ONDEMAND bit has been previously written to one, the oscillator will
only be running when requested by a peripheral. If there is no peripheral requesting the oscillator’s clock source,
the oscillator will be in a disabled state.
only be running when requested by a peripheral. If there is no peripheral requesting the oscillator’s clock source,
the oscillator will be in a disabled state.
If On Demand is disabled the oscillator will always be running when enabled.
0: The oscillator is always on, if enabled.
1: The oscillator is enabled when a peripheral is requesting the oscillator to be used as a clock source. The oscilla-
tor is disabled if no peripheral is requesting the clock source.
tor is disabled if no peripheral is requesting the clock source.
z
Bit 6 – Reserved
This bit is unused and reserved for future use. For compatibility with future devices, always write this bit to zero
when this register is written. This bit will always return zero when read.
This bit is unused and reserved for future use. For compatibility with future devices, always write this bit to zero
when this register is written. This bit will always return zero when read.
z
Bit 5 – Reserved
This bit is unused and reserved for future use. For compatibility with future devices, always write this bit to zero
when this register is written. This bit will always return zero when read.
This bit is unused and reserved for future use. For compatibility with future devices, always write this bit to zero
when this register is written. This bit will always return zero when read.
Bit
15
14
13
12
11
10
9
8
QLDIS
CCDIS
Access
R
R
R
R
R
R
R/W
R/W
Reset
0
0
0
0
0
0
0
0
Bit
7
6
5
4
3
2
1
0
ONDEMAND
LLAW
STABLE
MODE
ENABLE
Access
R/W
R
R
R/W
R/W
R/W
R/W
R
Reset
1
0
0
0
0
0
0
0