Atmel Xplained Pro Evaluation Kit ATSAMD20-XPRO ATSAMD20-XPRO Data Sheet
Product codes
ATSAMD20-XPRO
308
Atmel | SMART SAM D20 [DATASHEET]
Atmel-42129K–SAM-D20_datasheet–06/2014
22.5.3 Clocks
The EVSYS bus clock (CLK_EVSYS_APB) can be enabled and disabled in the Power Manager, and the default state of
CLK_EVSYS_APB can be found in the Peripheral Clock Masking section in
CLK_EVSYS_APB can be found in the Peripheral Clock Masking section in
Each EVSYS channel has a dedicated generic clock (GCLK_EVSYS_x). These are used for detection and propagation
of events for each channel. These clocks must be configured and enabled in the generic clock controller before using the
EVSYS. Refer to
of events for each channel. These clocks must be configured and enabled in the generic clock controller before using the
EVSYS. Refer to
for details.
22.5.4 DMA
Not applicable.
22.5.5 Interrupts
The interrupt request line is connected to the interrupt controller. Using the EVSYS interrupts requires the interrupt
controller to be configured first. Refer to
controller to be configured first. Refer to
for details.
22.5.6 Events
Not applicable.
22.5.7 Debug Operation
When the CPU is halted in debug mode, the EVSYS continues normal operation. If the EVSYS is configured in a way
that requires it to be periodically serviced by the CPU through interrupts or similar, improper operation or data loss may
result during debugging.
that requires it to be periodically serviced by the CPU through interrupts or similar, improper operation or data loss may
result during debugging.
22.5.8 Register Access Protection
All registers with write-access are optionally write-protected by the Peripheral Access Controller (PAC), except the
following register:
following register:
z
Interrupt Flag Status and Clear register (
)
Write-protection is denoted by the Write-Protected property in the register description.
Write-protection does not apply for accesses through an external debugger. Refer to
22.5.9 Analog Connections
Not applicable.
22.6
Functional Description
22.6.1 Principle of Operation
Event users are connected to multiplexers that have all available event channels as input. The multiplexer must be
configured to select one of these channels. The channels can be configured to route signals from any event generator,
but cannot be connected to multiple event generators.
configured to select one of these channels. The channels can be configured to route signals from any event generator,
but cannot be connected to multiple event generators.
22.6.2 Basic Operation
22.6.2.1 Initialization
The peripheral that is to act as event generator should be configured to be able to generate events. The peripheral to act
as event user should be configured to handle incoming events.
as event user should be configured to handle incoming events.
When this has been done, the event system is ready to be configured. The configuration must follow this order:
1.
Configure the event user by performing a single 16-bit write to the User Multiplexer register (
) with:
6.1.
The channel to be connected to a user is written to the Channel bit group (USER.CHANNEL)