Atmel Xplained Pro Evaluation Kit ATSAMD20-XPRO ATSAMD20-XPRO Data Sheet
Product codes
ATSAMD20-XPRO
314
Atmel | SMART SAM D20 [DATASHEET]
Atmel-42129K–SAM-D20_datasheet–06/2014
22.8
Register Description
Registers can be 8, 16 or 32 bits wide. Atomic 8-, 16- and 32-bit accesses are supported. In addition, the 8-bit quarters
and 16-bit halves of a 32-bit register and the 8-bit halves of a 16-bit register can be accessed directly.
and 16-bit halves of a 32-bit register and the 8-bit halves of a 16-bit register can be accessed directly.
Some registers are optionally write-protected by the Peripheral Access Controller (PAC). Write-protection is denoted by
the Write-Protected property in each individual register description. Refer to
the Write-Protected property in each individual register description. Refer to
and
for details.
22.8.1 Control
Name:
CTRL
Offset:
0x00
Reset:
0x00
Property:
Write-Protected
z
Bits 7:5 – Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to
zero when this register is written. These bits will always return zero when read.
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to
zero when this register is written. These bits will always return zero when read.
z
Bit 4 – GCLKREQ: Generic Clock Requests
This bit is used to determine whether the generic clocks used for the different channels should be on all the time or
only when an event needs the generic clock. Events propagated through asynchronous paths will not need a
generic clock.
This bit is used to determine whether the generic clocks used for the different channels should be on all the time or
only when an event needs the generic clock. Events propagated through asynchronous paths will not need a
generic clock.
0: Generic clock is requested and turned on only if an event is detected.
1: Generic clock for a channel is always on.
1: Generic clock for a channel is always on.
z
Bits 3:1 – Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to
zero when this register is written. These bits will always return zero when read.
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to
zero when this register is written. These bits will always return zero when read.
z
Bit 0 – SWRST: Software Reset
Writing a zero to this bit has no effect.
Writing a zero to this bit has no effect.
Writing a one to this bit resets all registers in the EVSYS to their initial state.
Writing a one to CTRL.SWRST will always take precedence, meaning that all other writes in the same write-oper-
ation will be discarded.
ation will be discarded.
Bit
7
6
5
4
3
2
1
0
GCLKREQ
SWRST
Access
R
R
R
R/W
R
R
R
W
Reset
0
0
0
0
0
0
0
0