Atmel Xplained Pro Evaluation Kit ATSAMD20-XPRO ATSAMD20-XPRO Data Sheet

Product codes
ATSAMD20-XPRO
Page of 660
372
Atmel | SMART SAM D20 [DATASHEET]
Atmel-42129K–SAM-D20_datasheet–06/2014
25.8
Register Description
Registers can be 8, 16 or 32 bits wide. Atomic 8-, 16- and 32-bit accesses are supported. In addition, the 8-bit quarters 
and 16-bit halves of a 32-bit register and the 8-bit halves of a 16-bit register can be accessed directly. 
Some registers are optionally write-protected by the Peripheral Access Controller (PAC). Write-protection is denoted by 
the Write-Protected property in each individual register description. Refer to 
 
for details.
Some registers require synchronization when read and/or written. Write-synchronization is denoted by the Write-
Synchronized property in each individual register description. Refer to 
Some registers are enable-protected, meaning they can only be written when the USART is disabled. Enable-protection 
is denoted by the Enable-Protected property in each individual register description.