Atmel ARM-Based Evaluation Kit for SAM4S16C, 32-Bit ARM® Cortex® Microcontroller ATSAM4S-WPIR-RD ATSAM4S-WPIR-RD Data Sheet

SAM4S Series [DATASHEET]

Atmel-11100G-ATARM-SAM4S-Datasheet_27-May-14

100



Immediately after the instruction that updated the flags



After any number of intervening instructions that have not updated the flags.

Conditional execution is available by using conditional branches or by adding condition code suffixes to 

instructions. See 

 for a list of the suffixes to add to instructions to make them conditional instructions. 

The condition code suffix enables the processor to test a condition based on the flags. If the condition test of a 

conditional instruction fails, the instruction:



Does not execute



Does not write any value to its destination register



Does not affect any of the flags



Does not generate any exception.

Conditional instructions, except for conditional branches, must be inside an If-Then instruction block. See 

 for 

more information and restrictions when using the IT instruction. Depending on the vendor, the assembler might 

automatically insert an IT instruction if there are conditional instructions outside the IT block.
The CBZ and CBNZ instructions are used to compare the value of a register against zero and branch on the result.
This section describes:





.

The APSR contains the following condition flags:
N Set to 1 when the result of the operation was negative, cleared to 0 otherwise.
Z Set to 1 when the result of the operation was zero, cleared to 0 otherwise.
C Set to 1 when the operation resulted in a carry, cleared to 0 otherwise.
V Set to 1 when the operation caused overflow, cleared to 0 otherwise.
For more information about the APSR, see 

A carry occurs:



If the result of an addition is greater than or equal to 2

32



If the result of a subtraction is positive or zero



As the result of an inline barrel shifter operation in a move or logical instruction.

An overflow occurs when the sign of the result, in bit[31], does not match the sign of the result, had the operation 

been performed at infinite precision, for example:



If adding two negative values results in a positive value



If adding two positive values results in a negative value



If subtracting a positive value from a negative value generates a positive value



If subtracting a negative value from a positive value generates a negative value.

The Compare operations are identical to subtracting, for CMP, or adding, for CMN, except that the result is 

discarded. See the instruction descriptions for more information.

Note:

Most instructions update the status flags only if the S suffix is specified. See the instruction descriptions for more 

information.

The instructions that can be conditional have an optional condition code, shown in syntax descriptions as {cond}. 

Conditional execution requires a preceding IT instruction. An instruction with a condition code is only executed if 

the condition code flags in the APSR meet the specified condition. 

 shows the condition codes to use.