Atmel ARM-Based Evaluation Kit for SAM4S16C, 32-Bit ARM® Cortex® Microcontroller ATSAM4S-WPIR-RD ATSAM4S-WPIR-RD Data Sheet

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SAM4S Series [DATASHEET]

Atmel-11100G-ATARM-SAM4S-Datasheet_27-May-14

The Analog Comparator Controller (ACC) controls the analog comparator settings and performs post-processing 

of the analog comparator output.
When the analog comparator settings are modified, the output of the analog cell may be invalid. The ACC masks 

the output for the invalid period.
A comparison flag is triggered by an event on the output of the analog comparator and an interrupt is generated. 

The event on the analog comparator output can be selected among falling edge, rising edge or any edge.
The ACC registers are listed in 

.

The user can select the input hysteresis and configure two different options, characterized as follows:



High-speed: shortest propagation delay/highest current consumption



Low-power: longest propagation delay/lowest current consumption

As soon as the analog comparator settings change, the output is invalid for a duration depending on ISEL current.
A masking period is automatically triggered as soon as a write access is performed on ACC_MR or ACC_ACR 

registers (whatever the register data content).
When ISEL = 0, the mask period is 8 × t

MCK

. When ISEL = 1, the mask period is 128 × *t

MCK

.

The masking period is reported by reading a negative value (bit 31 set) on ACC_ISR register

In fault mode, a comparison match event is communicated by the ACC fault output which is directly and internally 

connected to a PWM fault input. 
The source of the fault output can be configured as either a combinational value derived from the analog 

comparator output or as the MCK resynchronized value (Refer to 

To prevent any single software error from corrupting ACC behavior, certain registers in the address space can be 

write-protected by setting the WPEN bit in the 

 (ACC_WPMR).

If a write access to a write-protected register is detected, the WPVS flag in the 

 (ACC_WPSR) is set and the field WPVSRC indicates the register in which the write access has been 

attempted.
The WPVS bit is automatically cleared after reading the ACC_WPSR.
The following registers can be write-protected:



