Atmel ARM-Based Evaluation Kit for SAM4S16C, 32-Bit ARM® Cortex® Microcontroller ATSAM4S-WPIR-RD ATSAM4S-WPIR-RD Data Sheet

Product codes
ATSAM4S-WPIR-RD
Page of 1231
SAM4S Series [DATASHEET]
Atmel-11100G-ATARM-SAM4S-Datasheet_27-May-14
1066
42.6.2 Conversion Reference
The conversion is performed on a full range between 0V and the reference voltage pin ADVREF. Analog inputs 
between these voltages convert to values based on a linear conversion.
42.6.3 Conversion Resolution
The ADC supports 12-bit resolutions.
42.6.4 Conversion Results
When a conversion is completed, the resulting 12-bit digital value is stored in the Channel Data Register 
(ADC_CDRx) of the current channel and in the ADC Last Converted Data Register (ADC_LCDR). By setting the 
TAG option in the ADC_EMR, the ADC_LCDR presents the channel number associated to the last converted data 
in the CHNB field.
The channel EOC bit in the Status Register (ADC_SR) is set and the DRDY is set. In the case of a connected PDC 
channel, DRDY rising triggers a data request. In any case, either EOC and DRDY can trigger an interrupt.
Reading one of the Channel Data registers (ADC_CDRx) clears the corresponding EOC bit. Reading the 
ADC_LCDR clears the DRDY bit.
Figure 42-4.
EOCx and DRDY Flag Behavior 
If the ADC_CDR is not read before further incoming data is converted, the corresponding Overrun Error (OVREx) 
flag is set in the Overrun Status Register (ADC_OVER).
Likewise, new data converted when DRDY is high sets the GOVRE bit (General Overrun Error) in ADC_SR. 
The OVREx flag is automatically cleared when ADC_OVER is read, and GOVRE flag is automatically cleared 
when ADC_SR is read.
Read the ADC_CDRx
EOCx
DRDY
Read the ADC_LCDR
CHx
(ADC_CHSR)
(ADC_SR)
(ADC_SR)
Write the ADC_CR
   with START = 1
Write the ADC_CR
   with START = 1