Atmel ARM-Based Evaluation Kit for SAM4S16C, 32-Bit ARM® Cortex® Microcontroller ATSAM4S-WPIR-RD ATSAM4S-WPIR-RD Data Sheet

Product codes
ATSAM4S-WPIR-RD
Page of 1231
1075
SAM4S Series [DATASHEET]
Atmel-11100G-ATARM-SAM4S-Datasheet_27-May-14
42.7
Analog-to-Digital Converter (ADC) User Interface
Note: If an offset is not listed in the table it must be considered as “reserved”.
Table 42-8.
Register Mapping
Offset
Register
Name
Access
Reset
0x00
Control Register
ADC_CR
Write-only
0x04
Mode Register
ADC_MR
Read/Write
0x00000000
0x08
Channel Sequence Register 1 
ADC_SEQR1
Read/Write
0x00000000
0x0C
Channel Sequence Register 2
ADC_SEQR2
Read/Write
0x00000000
0x10
Channel Enable Register
ADC_CHER
Write-only
0x14
Channel Disable Register
ADC_CHDR
Write-only
0x18
Channel Status Register
ADC_CHSR
Read-only
0x00000000
0x1C
Reserved
0x20
Last Converted Data Register
ADC_LCDR
Read-only
0x00000000
0x24
Interrupt Enable Register
ADC_IER
Write-only
0x28
Interrupt Disable Register
ADC_IDR
Write-only
0x2C
Interrupt Mask Register
ADC_IMR
Read-only
0x00000000
0x30
Interrupt Status Register
ADC_ISR
Read-only
0x00000000
0x3C
Overrun Status Register
ADC_OVER
Read-only
0x00000000
0x40
Extended Mode Register
ADC_EMR
Read/Write
0x00000000
0x44
Compare Window Register
ADC_CWR
Read/Write
0x00000000
0x48
Channel Gain Register
ADC_CGR
Read/Write
0x00000000
0x4C
Channel Offset Register
ADC_COR
Read/Write
0x00000000
0x50
Channel Data Register 0
ADC_CDR0
Read-only
0x00000000
0x54
Channel Data Register 1
ADC_CDR1
Read-only
0x00000000
...
...
...
...
...
0x8C
Channel Data Register 15
ADC_CDR15
Read-only
0x00000000
0x90
Reserved
0x94
Analog Control Register
ADC_ACR
Read/Write
0x00000100
0x98–0xAC
Reserved
0xC4–0xE0
Reserved
0xE4
Write Protection Mode Register
ADC_WPMR
Read/Write
0x00000000
0xE8
Write Protection Status Register
ADC_WPSR
Read-only
0x00000000
0xEC–0xF8
Reserved
 0xFC
Reserved
0x100–0x124
Reserved for PDC registers