Atmel ARM-Based Evaluation Kit for SAM4S16C, 32-Bit ARM® Cortex® Microcontroller ATSAM4S-WPIR-RD ATSAM4S-WPIR-RD Data Sheet

Product codes
ATSAM4S-WPIR-RD
Page of 1231
1087
SAM4S Series [DATASHEET]
Atmel-11100G-ATARM-SAM4S-Datasheet_27-May-14
42.7.10 ADC Interrupt Disable Register 
Name:
ADC_IDR
Address:
0x40038028
Access:
Write-only  
The following configuration values are valid for all listed bit names of this register:
0: No effect.
1: Disables the corresponding interrupt.
• EOCx: End of Conversion Interrupt Disable x
• EOCAL: End of Calibration Sequence
• DRDY: Data Ready Interrupt Disable
• GOVRE: General Overrun Error Interrupt Disable
• COMPE: Comparison Event Interrupt Disable
• ENDRX: End of Receive Buffer Interrupt Disable
• RXBUFF: Receive Buffer Full Interrupt Disable
31
30
29
28
27
26
25
24
RXBUFF
ENDRX
COMPE
GOVRE
DRDY
23
22
21
20
19
18
17
16
EOCAL
15
14
13
12
11
10
9
8
EOC15
EOC14
EOC13
EOC12
EOC11
EOC10
EOC9
EOC8
7
6
5
4
3
2
1
0
EOC7
EOC6
EOC5
EOC4
EOC3
EOC2
EOC1
EOC0