Atmel ARM-Based Evaluation Kit for SAM4S16C, 32-Bit ARM® Cortex® Microcontroller ATSAM4S-WPIR-RD ATSAM4S-WPIR-RD Data Sheet
Product codes
ATSAM4S-WPIR-RD
SAM4S Series [DATASHEET]
Atmel-11100G-ATARM-SAM4S-Datasheet_27-May-14
1180
44.12.7.1USART SPI TImings
Notes: 1. 1.8V domain: VDDIO from 1.65V to 1.95V, maximum external capacitor = 20 pF
2. 3.3V domain: VDDIO from 2.85V to 3.6V, maximum external capacitor = 40 pF
Table 44-69.
USART SPI Timings
Symbol
Parameter
Conditions
Min
Max
Units
Master Mode
SPI
0
SCK Period
1.8V domain
3.3V domain
3.3V domain
MCK/6
—
ns
SPI
1
Input Data Setup Time
1.8V domain
3.3V domain
3.3V domain
0.5 * MCK + 0.8
0.5 * MCK + 1.0
0.5 * MCK + 1.0
—
ns
SPI
2
Input Data Hold Time
1.8V domain
3.3V domain
3.3V domain
1.5 * MCK + 0.3
1.5 * MCK + 0.1
1.5 * MCK + 0.1
—
ns
SPI
3
Chip Select Active to Serial Clock
1.8V domain
3.3V domain
3.3V domain
1.5 * SPCK - 1.5
1.5 * SPCK - 2.1
1.5 * SPCK - 2.1
—
ns
SPI
4
Output Data Setup Time
1.8V domain
3.3V domain
3.3V domain
- 7.9
- 7.2
- 7.2
9.9
10.7
ns
SPI
5
Serial Clock to Chip Select Inactive
1.8V domain
3.3V domain
3.3V domain
1 * SPCK - 7.7
1 * SPCK - 11.8
—
ns
Slave Mode
SPI
6
SCK Falling to MISO
1.8V domain
3.3V domain
3.3V domain
4.7
4
17.3
15.2
15.2
ns
SPI
7
MOSI Setup Time before SCK Rises
1.8V domain
3.3V domain
3.3V domain
2 * MCK + 0.7
2 * MCK
—
ns
SPI
8
MOSI Hold Time after SCK Rises
1.8V domain
3.3V domain
3.3V domain
0
0.1
—
ns
SPI
9
SCK Rising to MISO
1.8V domain
3.3V domain
3.3V domain
4.7
4.1
4.1
20.1
15.5
15.5
ns
SPI
10
MOSI Setup Time before SCK Falls
1.8V domain
3.3V domain
3.3V domain
2 * MCK + 0.7
2 * MCK + 0.6
2 * MCK + 0.6
—
ns
SPI
11
MOSI Hold Time after SCK Falls
1.8V domain
3.3V domain
3.3V domain
0.2
0.1
0.1
—
ns
SPI
12
NPCS0 Setup to SCK Rising
1.8V domain
3.3V domain
3.3V domain
2.5 * MCK + 0.5
2.5 * MCK
—
ns
SPI
13
NPCS0 Hold after SCK Falling
1.8V domain
3.3V domain
3.3V domain
1.5 * MCK + 0.2
1.5 * MCK
—
ns
SPI
14
NPCS0 Setup to SCK Falling
1.8V domain
3.3V domain
3.3V domain
2.5 * MCK + 0.5
2.5 * MCK + 0.3
—
ns
SPI
15
NPCS0 Hold after SCK Rising
1.8V domain
3.3V domain
3.3V domain
1.5 * MCK
1.5 * MCK
1.5 * MCK
—
ns