Atmel ARM-Based Evaluation Kit for SAM4S16C, 32-Bit ARM® Cortex® Microcontroller ATSAM4S-WPIR-RD ATSAM4S-WPIR-RD Data Sheet

SAM4S Series [DATASHEET]

Atmel-11100G-ATARM-SAM4S-Datasheet_27-May-14

122

Condition Flags
If 

S

 is specified:



These instructions update the N and Z flags according to the result



The C flag is updated to the last bit shifted out, except when the shift length is 0, see 

Examples

ASR

R7, R8, #9

; Arithmetic shift right by 9 bits

SLS

 R1, R2, #3

; Logical shift left by 3 bits with flag update

LSR

R4, R5, #6

; Logical shift right by 6 bits

ROR

R4, R5, R6

; Rotate right by the value in the bottom byte of R6

RRX

R4, R5

; Rotate right with extend.

Count Leading Zeros.
Syntax

CLZ{cond} Rd, Rm

where:
condis an optional condition code, see 

.

Rdis the destination register.
Rmis the operand register.
Operation
The CLZ instruction counts the number of leading zeros in the value in Rm and returns the result in Rd. The result 

value is 32 if no bits are set and zero if bit[31] is set.
Restrictions
Do not use SP and do not use PC.
Condition Flags
This instruction does not change the flags.
Examples

CLZ

 R4,R9

CLZNE

R2,R3