Atmel ARM-Based Evaluation Kit for SAM4S16C, 32-Bit ARM® Cortex® Microcontroller ATSAM4S-WPIR-RD ATSAM4S-WPIR-RD Data Sheet

SAM4S Series [DATASHEET]

Atmel-11100G-ATARM-SAM4S-Datasheet_27-May-14

158

Signed and Unsigned Long Multiply, with optional Accumulate, using 32-bit operands and producing a 64-bit 

result.
Syntax

op{cond} RdLo, RdHi, Rn, Rm

where:
opis one of:
UMULL Unsigned Long Multiply.
UMLAL Unsigned Long Multiply, with Accumulate.
SMULL Signed Long Multiply.
SMLAL Signed Long Multiply, with Accumulate.
condis an optional condition code, see 

.

RdHi, RdLoare the destination registers. For UMLAL and SMLAL they also hold the accu

mulating value.
Rn, Rmare registers holding the operands.
Operation
The UMULL instruction interprets the values from Rn and Rm as unsigned integers. It multiplies these integers and 

places the least significant 32 bits of the result in RdLo, and the most significant 32 bits of the result in RdHi.
The UMLAL instruction interprets the values from Rn and Rm as unsigned integers. It multiplies these integers, 

adds the 64-bit result to the 64-bit unsigned integer contained in RdHi and RdLo, and writes the result back to 
RdHi

 and RdLo.

The SMULL instruction interprets the values from Rn and Rm as two’s complement signed integers. It multiplies 

these integers and places the least significant 32 bits of the result in RdLo, and the most significant 32 bits of the 

result in RdHi.
The SMLAL instruction interprets the values from Rn and Rm as two’s complement signed integers. It multiplies 

these integers, adds the 64-bit result to the 64-bit signed integer contained in RdHi and RdLo, and writes the result 

back to RdHi and RdLo.
Restrictions
In these instructions:



Do not use SP and do not use PC



 and RdLo must be different registers.

Condition Flags
These instructions do not affect the condition code flags.
Examples

UMULL

R0, R4, R5, R6 

; Unsigned (R4,R0) = R5 x R6

SMLAL

R4, R5, R3, R8 

; Signed (R5,R4) = (R5,R4) + R3 x R8