Atmel ARM-Based Evaluation Kit for SAM4S16C, 32-Bit ARM® Cortex® Microcontroller ATSAM4S-WPIR-RD ATSAM4S-WPIR-RD Data Sheet

SAM4S Series [DATASHEET]

Atmel-11100G-ATARM-SAM4S-Datasheet_27-May-14

176

Bit Field Clear and Bit Field Insert.
Syntax

BFC{cond} Rd, #lsb, #width

BFI{cond} Rd, Rn, #lsb, #width

where:
condis an optional condition code, see 

.

Rdis the destination register.
Rnis the source register.
lsbis the position of the least significant bit of the bitfield. lsb must be in the range

0 to 31.
widthis the width of the bitfield and must be in the range 1 to 32-lsb.
Operation
BFC clears a bitfield in a register. It clears width bits in Rd, starting at the low bit position lsb. Other bits in Rd are 

unchanged.
BFI copies a bitfield into one register from another register. It replaces width bits in Rd starting at the low bit 

position lsb, with width bits from Rn starting at bit[0]. Other bits in Rd are unchanged.
Restrictions
Do not use SP and do not use PC.
Condition Flags
These instructions do not affect the flags.
Examples

BFC

R4, #8, #12

; Clear bit 8 to bit 19 (12 bits) of R4 to 0

BFI

R9, R2, #8, #12 

; Replace bit 8 to bit 19 (12 bits) of R9 with

; bit 0 to bit 11 from R2.